English | 繁體

Search in the results

UM

Browse/Search Results:  1-10 of 13 Help

Selected(0)Clear Items/Page:    Sort:
Area-efficient ultra-wide-tuning-range ring oscillators in 65-nm complementary metal–oxide–semiconductor Journal article
Yang, Chaowei, Chen, Yong, Cheng, Kai, Stefano, Crovetti Paolo, Martins, Rui P., Mak, Pui In. Area-efficient ultra-wide-tuning-range ring oscillators in 65-nm complementary metal–oxide–semiconductor[J]. International Journal of Circuit Theory and Applications, 2024.
Authors:  Yang, Chaowei;  Chen, Yong;  Cheng, Kai;  Stefano, Crovetti Paolo;  Martins, Rui P.; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:1.8/1.7 | Submit date：2024/08/05
Clock And Data Recovery (Cdr)  Cmos Figure-of-merit (Fom)  Figure-of-merit With Tuning And Area (Fomta)  Figure-of-merit With Tuning Range (Fomt)  Flicker (1/f)  Noise Noise Transfer Phase Noise (Pn)  Phase-locked Loop (Pll)  Quality Factor Switched-capacitor Array (Sca)  Thermal Noise Transformer Tuning Range (Tr)  Ultra-wide-tuning-range Voltage-controlled Oscillator (Vco)  
A 0.0035-mm20.42-pJ/bit 8-32-Gb/s Reference-Less CDR Incorporating Adaptively-Biased ChargeSharing Integrator, Alexander PFD, and 1-Tap DFE Conference paper
Zhang, Zhaoyu, Zhang, Zhao, Chen, Yong, Wang, Guoqing, Shen, Xinyu, Qi, Nan, Li, Guike, Yu, Shuangming, Liu, Jian, Wu, Nanjian, Liu, Liyuan. A 0.0035-mm20.42-pJ/bit 8-32-Gb/s Reference-Less CDR Incorporating Adaptively-Biased ChargeSharing Integrator, Alexander PFD, and 1-Tap DFE[C], New York, USA:IEEE, 2023, 177-180.
Authors:  Zhang, Zhaoyu;  Zhang, Zhao;  Chen, Yong;  Wang, Guoqing;  Shen, Xinyu; et al.
Favorite | TC[WOS]:0 TC[Scopus]:1 | Submit date：2024/02/22
Charge Sharing Integrator  Clock And Data Recovery (Cdr)  Cmos  Continuous-rate  Reference-less  
A 50Gb/s CMOS Optical Receiver With Si-Photonics PD for High-Speed Low-Latency Chiplet I/O Journal article
Chen, Sikai, You, Mingyang, Yang, Yunqi, Jin, Ye, Lin, Ziyi, Li, Yihong, Li, Leliang, Li, Guike, Xie, Yujun, Zhang, Zhao, Wang, Binhao, Tang, Ningfeng, Liu, Faju, Fang, Zheyu, Liu, Jian, Wu, Nanjian, Chen, Yong, Liu, Liyuan, Zhu, Ninghua, Li, Ming, Qi, Nan. A 50Gb/s CMOS Optical Receiver With Si-Photonics PD for High-Speed Low-Latency Chiplet I/O[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2023, 70(11), 4271-4282.
Authors:  Chen, Sikai;  You, Mingyang;  Yang, Yunqi;  Jin, Ye;  Lin, Ziyi; et al.
Favorite | TC[WOS]:3 TC[Scopus]:3  IF:5.2/4.5 | Submit date：2023/12/04
Baud-rate  Cdr  Chiplet  Cmos  Multi-chip Module (Mcm)  Optical I/o  Optical Receiver  Silicon Photonics  Tia  
A 28-Gb/s 13.8-mW Half-Rate Bang-Bang Clock and Data Recovery Circuit Using Return-to-Zero-Based Symmetrical Bang-Bang Phase Detector Conference paper
Ge, Xinyi, Chen, Yong, Wang, Lin, Qi, Nan, Mak, Pui In, Martins, Rui P.. A 28-Gb/s 13.8-mW Half-Rate Bang-Bang Clock and Data Recovery Circuit Using Return-to-Zero-Based Symmetrical Bang-Bang Phase Detector[C]:IEEE, 345 E 47TH ST, NEW YORK, NY 10017 USA, 2022.
Authors:  Ge, Xinyi;  Chen, Yong;  Wang, Lin;  Qi, Nan;  Mak, Pui In; et al.
Favorite | TC[WOS]:4 TC[Scopus]:5 | Submit date：2023/01/30
Bang-bang Phase Detector (Bbpd)  Charge Steering  Clock And Data Recovery (Cdr)  Cmos  Half Rate  Non- Return-to-zero (Nrz)  Quadrature Voltage-controlled Oscillator (Qvco)  Return-to-zero (Rz)  Rz-to-nrz Converter  
A 50-Gb/s PAM-4 Silicon-Photonic Transmitter Incorporating Lumped-Segment MZM, Distributed CMOS Driver, and Integrated CDR Journal article
Liao, Qiwen, Zhang, Yuguang, Ma, Siyuan, Wang, Lei, Li, Leliang, Li, Guike, Zhang, Zhao, Liu, Jian, Wu, Nanjian, Liu, Liyuan, Chen, Yong, Xiao, Xi, Qi, Nan. A 50-Gb/s PAM-4 Silicon-Photonic Transmitter Incorporating Lumped-Segment MZM, Distributed CMOS Driver, and Integrated CDR[J]. IEEE Journal of Solid-State Circuits, 2022, 57(3), 767-780.
Authors:  Liao, Qiwen;  Zhang, Yuguang;  Ma, Siyuan;  Wang, Lei;  Li, Leliang; et al.
Favorite | TC[WOS]:23 TC[Scopus]:30  IF:4.6/5.6 | Submit date：2022/03/28
Clock And Data Recovery (Cdr)  Cmos  Distributed Driver  Four-level Pulse Amplitude (Pam-4)  Machâ Zehnder Modulator (Mzm)  Optical Digital-to-analog Converter (Dac)  Silicon Photonic (Siph)  Transmitter (Tx)  
A 4×25Gb/s De-Serializer with Baud-Rate Sampling CDR and Standing-Wave Clock Distribution for NIC Optical Interconnects Conference paper
Mingyang You, Minjia Chen, Yihong Li, Guike Li, Jian Liu, Yong Chen, Yingtao Li, Nan Qi. A 4×25Gb/s De-Serializer with Baud-Rate Sampling CDR and Standing-Wave Clock Distribution for NIC Optical Interconnects[C]:IEEE, 2021, 253 - 254.
Authors:  Mingyang You;  Minjia Chen;  Yihong Li;  Guike Li;  Jian Liu; et al.
Favorite | TC[Scopus]:3 | Submit date：2022/05/13
Baud-rate  Clock And Data Recovery (Cdr)  Clock Distribution  Cmos  De-serializer  Phase Interpolation  Standing Wave  
A 4×25-Gb/s Serializer with Integrated CDR and 3-Tap FFE Driver for NIC Optical Interconnects Conference paper
Ming Zhong, Qingwen Wang, Yong Chen, Jian Liu, Liyuan Liu, Xinghua Wang, Xiaoming Xiong, Nan Qi. A 4×25-Gb/s Serializer with Integrated CDR and 3-Tap FFE Driver for NIC Optical Interconnects[C]:IEEE, 2021, 255-256.
Authors:  Ming Zhong;  Qingwen Wang;  Yong Chen;  Jian Liu;  Liyuan Liu; et al.
Favorite | TC[Scopus]:7 | Submit date：2022/05/13
Clock And Data Recovery (Cdr)  Driver  Equalization  Serializer  Source-series-terminated (Sst)  
A sub-0.25pJ/bit 47.6- to-58.8Gb/s reference-less single-loop PAM-4 bang-bang CDR with a deliberately-current- mismatch frequency acquisition technique in 28nm CMOS Conference paper
Zhao, X., Chen, Y., Mak, P. I., Martins, R. P.. A sub-0.25pJ/bit 47.6- to-58.8Gb/s reference-less single-loop PAM-4 bang-bang CDR with a deliberately-current- mismatch frequency acquisition technique in 28nm CMOS[C], 2021.
Authors:  Zhao, X.;  Chen, Y.;  Mak, P. I.;  Martins, R. P.
Favorite |  | Submit date：2022/01/25
CDR  CMOS  Reference  
A 0.01mm2 1.2-pJ/bit 6.4-to-8Gb/s reference-less FD-less BBCDR using a deliberately-clock-selected strobe point based on a 2π/3-interval phase Conference paper
Zhao, X., Chen, Y., Mak, P. I., Martins, R. P.. A 0.01mm2 1.2-pJ/bit 6.4-to-8Gb/s reference-less FD-less BBCDR using a deliberately-clock-selected strobe point based on a 2π/3-interval phase[C], 2021.
Authors:  Zhao, X.;  Chen, Y.;  Mak, P. I.;  Martins, R. P.
Favorite |  | Submit date：2022/01/25
CDR  CMOS  Reference  
CDR3 sequences in IgA nephropathy are shorter and exhibit reduced diversity Journal article
Zhang, Xi, Zeng, Jianming, Tong, Yin, Zhang, Li, Lu, Xibin, Zhu, Shenglang, Li, Zhoufang. CDR3 sequences in IgA nephropathy are shorter and exhibit reduced diversity[J]. FEBS Open Bio, 2020, 10(12), 2702-2711.
Authors:  Zhang, Xi;  Zeng, Jianming;  Tong, Yin;  Zhang, Li;  Lu, Xibin; et al.
Favorite | TC[WOS]:5 TC[Scopus]:5  IF:2.8/2.6 | Submit date：2021/12/06
Cdr3 Length  Iga  Iga Nephropathy  Igg  Igm