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A SAR-ADC-Assisted DC-DC Converter with Fast Transient Recovery Journal article
Zeng, W. L., Bonizzoni, E., U, C.-W., Lam, C. S., Sin, S. W., Chio, U-F., Maloberti, F., Martins, R. P.. A SAR-ADC-Assisted DC-DC Converter with Fast Transient Recovery[J]. IEEE Transactions on Circuits and Systems II - Express Briefs, 2020, 1669-1673.
Authors:  Zeng, W. L.;  Bonizzoni, E.;  U, C.-W.;  Lam, C. S.;  Sin, S. W.; et al.
Favorite |   IF:4.0/3.7 | Submit date：2022/01/25
Adc  Current Pump  Additional Loop Compensation  Buck Converter  Dcm  Bond-wire Inductor  Fast Transient Recovery.  
“Design of KY converter with COT control under DCM operation”, 2019 International Symposium on Integrated Circuits and Systems (ISICAS) Presentation
会议地点: Venice, Italy, 报告日期: 2019-08-29
Authors:  Zeng, W.-L.;  Lin, Z.-Y.;  Lam, C. S.;  Law, M. K.;  Sin, S. W.; et al.
Favorite |  | Submit date：2022/01/25
A 550-μW 20-kHz BW 100.8-dB SNDR Linear-Exponential Multi-Bit Incremental Σ Δ ADC With 256 Clock Cycles in 65-nm CMOS Journal article
Wang, B., Sin, S. W., U, S.P., Maloberti, F., Martins, R. P.. A 550-μW 20-kHz BW 100.8-dB SNDR Linear-Exponential Multi-Bit Incremental Σ Δ ADC With 256 Clock Cycles in 65-nm CMOS[J]. IEEE Journal of Solid-State Circuits (Invited Special Issue of VLSI), 2019, 1161-1172.
Authors:  Wang, B.;  Sin, S. W.;  U, S.P.;  Maloberti, F.;  Martins, R. P.
Favorite |   IF:4.6/5.6 | Submit date：2022/01/25
Analog-to-digital Converter  Iadc  Incremental Adc  Sigma-delta  Linear  Exponential  Accumulation  Two-phase  Multi-bit  Mismatch Error  Dynamic Element Matching (Dem)  Data Weighting Average (Dwa)  High Linearity  Notch  
Design of a High-Speed Time-Interleaved Sub-Ranging SAR ADC with Optimal Code Transfer Technique Journal article
Xing D., Zhu Y., Chan C.-H., Maloberti F., Seng-Pan U., Martins R.P.. Design of a High-Speed Time-Interleaved Sub-Ranging SAR ADC with Optimal Code Transfer Technique[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2019, 66(2), 489-501.
Authors:  Xing D.;  Zhu Y.;  Chan C.-H.;  Maloberti F.;  Seng-Pan U.; et al.
Favorite | TC[WOS]:2 TC[Scopus]:5  IF:5.2/4.5 | Submit date：2019/02/11
Reference Interference  Sar Adc  Time-interleaved Scheme  Two-step Sar Conversion  
A integrated dc-dc converter with segmented frequency modulation and multiphase co-work control for fast transient recovery Conference paper
Chio, U F., Wen, K. C., Sin, S. W., Lam, C. S., Lu, Y., Maloberti, F., Martins, R. P.. A integrated dc-dc converter with segmented frequency modulation and multiphase co-work control for fast transient recovery[C], Tainan, Taiwan:IEEE, 2018, 31-32.
Authors:  Chio, U F.;  Wen, K. C.;  Sin, S. W.;  Lam, C. S.;  Lu, Y.; et al.
Favorite |  | Submit date：2022/01/24
SC DC-DC converter  fully integrated  switched-capacitor  voltage-controlled oscillator (VCO)  
Nano-Ampere Low Dropout Regulator Designs for IoT Devices Journal article
Huang, Y., Lu, Y., Maloberti, F., Martins, R. P.. Nano-Ampere Low Dropout Regulator Designs for IoT Devices[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2018, 4017-4026.
Authors:  Huang, Y.;  Lu, Y.;  Maloberti, F.;  Martins, R. P.
Favorite | TC[WOS]:53 TC[Scopus]:64  IF:5.2/4.5 | Submit date：2022/01/24
Ldo Regulator  Output-capacitor-free Ldo Regulator  Ultra-low Quiescent Ldo  Dynamic Current Boosting  
Nano-ampere low-dropout regulator designs for IoT devices Journal article
Huang Y., Lu Y., Maloberti F., Martins R.P.. Nano-ampere low-dropout regulator designs for IoT devices[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2018, 65(11), 4017-4026.
Authors:  Huang Y.;  Lu Y.;  Maloberti F.;  Martins R.P.
Favorite | TC[WOS]:53 TC[Scopus]:64 | Submit date：2019/02/11
Dynamic Current Boosting  Ldo Regulator  Output-capacitor-free Ldo Regulator  Ultra-low Quiescent Ldo  
A 10-MHz Bandwidth Two-Path Third-Order SD Modulator with Cross-Coupling Branches Journal article
Feng, D., Bonizzoni, E., Maloberti, F., Sin, S. W., Martins, R. P.. A 10-MHz Bandwidth Two-Path Third-Order SD Modulator with Cross-Coupling Branches[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2018, 1410-1414.
Authors:  Feng, D.;  Bonizzoni, E.;  Maloberti, F.;  Sin, S. W.;  Martins, R. P.
Favorite |   IF:4.0/3.7 | Submit date：2022/01/24
Σδ Delta Modulator  Two-path  Cross-coupling  Noise Transfer Function  Polyphase Decomposition.  
A 10-MHz Bandwidth Two-Path Third-Order Σ Δ Modulator with Cross-Coupling Branches Journal article
Feng D., Bonizzoni E., Maloberti F., Sin S.-W., Martins R.. A 10-MHz Bandwidth Two-Path Third-Order Σ Δ Modulator with Cross-Coupling Branches[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2018, 65(10), 1410-1414.
Authors:  Feng D.;  Bonizzoni E.;  Maloberti F.;  Sin S.-W.;  Martins R.
Favorite | TC[WOS]:4 TC[Scopus]:4 | Submit date：2019/02/11
Cross-coupling  Noise Transfer Function  Polyphase Decomposition  Two-path  Σδ Modulator  
A 550W 20kHz BW 100.8dB SNDR Linear-Exponential Multi-Bit Incremental Converter with 256-cycles in 65nm CMOS Conference paper
Wang, B., Sin, S. W., U, S.P., Maloberti, F., Martins, R. P.. A 550W 20kHz BW 100.8dB SNDR Linear-Exponential Multi-Bit Incremental Converter with 256-cycles in 65nm CMOS[C], US:IEEE, 2018.
Authors:  Wang, B.;  Sin, S. W.;  U, S.P.;  Maloberti, F.;  Martins, R. P.
Favorite |  | Submit date：2022/01/24
Incremental Converter  Analog to Digital Converter  ADC