UM

Browse/Search Results:  1-10 of 31 Help

Selected(0)Clear Items/Page:    Sort:
A 5.99-GHz VCO with Wideband-Differential-Mode Second Harmonic Resonance Achieving - 138.9 dBc/Hz Phase Noise at an Offset of 10 MHz Journal article
Yang, Chaowei, Chen, Yong, Huang, Yunbo, Martins, Rui P., Mak, Pui In. A 5.99-GHz VCO with Wideband-Differential-Mode Second Harmonic Resonance Achieving - 138.9 dBc/Hz Phase Noise at an Offset of 10 MHz[J]. IEEE Microwave and Wireless Technology Letters, 2024, 34(11), 1267-1270.
Authors:  Yang, Chaowei;  Chen, Yong;  Huang, Yunbo;  Martins, Rui P.;  Mak, Pui In
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:0/0 | Submit date:2024/11/05
1/f3 Pn Corner  Cmos  Figure-of-merit (Fom)  Impulse Sensitivity Function (Isf)  Phase Noise (Pn)  Voltage-controlled Oscillator (Vco)  Wideband-harmonic Shaping  
A 167-μW 71.7-dB SFDR 2.4-GHz BLE Receiver Using a Passive Quadrature Front End, a Double-Sided Double-Balanced Cascaded Mixer, and a Dual-Transformer-Coupled Class-D VCO Journal article
Shao, Haijun, Martins, Rui P., Mak, Pui In. A 167-μW 71.7-dB SFDR 2.4-GHz BLE Receiver Using a Passive Quadrature Front End, a Double-Sided Double-Balanced Cascaded Mixer, and a Dual-Transformer-Coupled Class-D VCO[J]. IEEE Journal of Solid-State Circuits, 2024.
Authors:  Shao, Haijun;  Martins, Rui P.;  Mak, Pui In
Favorite | TC[WOS]:0 TC[Scopus]:1  IF:4.6/5.6 | Submit date:2024/11/05
Adjacent Channel  Bluetooth Low Energy (Ble)  Cascaded  Cmos  Double Balanced  Figure Of Merit (Fom)  Hybrid Coupler  Noise Figure (Nf)  Notching  Out Of Band (Oob)  Passive Intensive  Phase Noise (Pn)  Quadrature  Signal-to-noise Ratio (Snr)  Spurious-free Dynamic Range (Sfdr)  Ultra-low-power (Ulp)  Voltage-controlled Oscillator (Vco)  
Area-efficient ultra-wide-tuning-range ring oscillators in 65-nm complementary metal–oxide–semiconductor Journal article
Yang, Chaowei, Chen, Yong, Cheng, Kai, Stefano, Crovetti Paolo, Martins, Rui P., Mak, Pui In. Area-efficient ultra-wide-tuning-range ring oscillators in 65-nm complementary metal–oxide–semiconductor[J]. International Journal of Circuit Theory and Applications, 2024.
Authors:  Yang, Chaowei;  Chen, Yong;  Cheng, Kai;  Stefano, Crovetti Paolo;  Martins, Rui P.; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:1.8/1.7 | Submit date:2024/08/05
Clock And Data Recovery (Cdr)  Cmos Figure-of-merit (Fom)  Figure-of-merit With Tuning And Area (Fomta)  Figure-of-merit With Tuning Range (Fomt)  Flicker (1/f)  Noise Noise Transfer Phase Noise (Pn)  Phase-locked Loop (Pll)  Quality Factor Switched-capacitor Array (Sca)  Thermal Noise Transformer Tuning Range (Tr)  Ultra-wide-tuning-range Voltage-controlled Oscillator (Vco)  
A 6-GHz 78-fsRMS Double-Sampling PLL With Low-Ripple Bootstrapped DSPD and Retimer-Less MMD Achieving −92-dBc Reference Spur and −258-dB FOM Journal article
Ren, Hongyu, Yang, Zunsong, Huang, Yunbo, Feng, Chaoping, Chen, Tianle, Zhang, Xinming, Meng, Xianghe, Yan, Weiwei, Zhang, Weidong, Iizuka, Tetsuya, Chen, Yong, Mak, Pui In, Han, Zhengsheng, Li, Bo. A 6-GHz 78-fsRMS Double-Sampling PLL With Low-Ripple Bootstrapped DSPD and Retimer-Less MMD Achieving −92-dBc Reference Spur and −258-dB FOM[J]. IEEE Microwave and Wireless Technology Letters, 2024, 34(5), 548-551.
Authors:  Ren, Hongyu;  Yang, Zunsong;  Huang, Yunbo;  Feng, Chaoping;  Chen, Tianle; et al.
Favorite | TC[WOS]:0 TC[Scopus]:2  IF:0/0 | Submit date:2024/05/16
Double Sampling (Ds)  Figure Of Merit (Fom)  Frequency Synthesizer  Low Jitter  Low Spur  Phase Detector (Pd)  Phase-locked Loop (Pll)  Phase Noise (Pn)  Reference Sampling (Rs)  Subsampling (Ss)  Phase Locked Loops  Type-i  
A 9.97-GHz 190.6-dBc/Hz FOM CMOS VCO Featuring Nested Common-Mode Resonator and Intrinsic Differential 2nd-Harmonic Output Conference paper
Huang, Yunbo, Chen, Yong, Yang, Chaowei, Mak, Pui In, Martins, Rui P.. A 9.97-GHz 190.6-dBc/Hz FOM CMOS VCO Featuring Nested Common-Mode Resonator and Intrinsic Differential 2nd-Harmonic Output[C], USA:Institute of Electrical and Electronics Engineers Inc., 2023.
Authors:  Huang, Yunbo;  Chen, Yong;  Yang, Chaowei;  Mak, Pui In;  Martins, Rui P.
Favorite | TC[WOS]:0 TC[Scopus]:1 | Submit date:2024/02/23
1/f3pn Corner  Cmos  Common-mode (Cm) Resonance  Figure-of-merit (Fom)  Flicker (1/f) Noise  Impulse Sensitivity Function (Isf)  Noise Transfer  Phase Noise (Pn)  Quality Factor  Thermal Noise  Tuning Range (Tr)  Voltage-controlled Oscillator (Vco)  
A 3.78-GHz Type-I Sampling PLL With a Fully Passive KPD-Doubled Primary-Secondary S-PD Measuring 39.6-fsRMSJitter, -260.2-dB FOM, and -70.96-dBc Reference Spur Journal article
Huang, Yunbo, Chen, Yong, Zhao, Bo, Mak, Pui In, Martins, Rui P.. A 3.78-GHz Type-I Sampling PLL With a Fully Passive KPD-Doubled Primary-Secondary S-PD Measuring 39.6-fsRMSJitter, -260.2-dB FOM, and -70.96-dBc Reference Spur[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2023, 70(4), 1463-1475.
Authors:  Huang, Yunbo;  Chen, Yong;  Zhao, Bo;  Mak, Pui In;  Martins, Rui P.
Favorite | TC[WOS]:6 TC[Scopus]:11  IF:5.2/4.5 | Submit date:2023/05/02
Cmos  Type-i Sampling Phase-locked Loop (S-pll)  Voltage-controlled Oscillator (Vco)  Reference (Ref) Feedthrough Suppression  Figure-of-merit (Fom)  Phase-detection Gain (Kpd)  Sampling Phase Detector (S-pd)  
A 3.6-GHz Type-II Sampling PLL With a Differential Parallel-Series Double-Edge S-PD Scoring 43.1-fsRMS Jitter, −258.7-dB FOM, and −75.17-dBc Reference Spur Journal article
Yunbo Huang, Yong Chen, Bo Zhao, Pui-In Mak, Rui P. Martins. A 3.6-GHz Type-II Sampling PLL With a Differential Parallel-Series Double-Edge S-PD Scoring 43.1-fsRMS Jitter, −258.7-dB FOM, and −75.17-dBc Reference Spur[J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2022, 31(2), 188-198.
Authors:  Yunbo Huang;  Yong Chen;  Bo Zhao;  Pui-In Mak;  Rui P. Martins
Favorite | TC[WOS]:4 TC[Scopus]:9  IF:2.8/2.8 | Submit date:2023/02/22
Cmos  Figure-of-merit (Fom)  Harmonic-rich Voltage-controlled Oscillator (Vco)  Integrated Jitter, Phase-detection Gain (Kpd)  Reference (Ref) Feedthrough Suppression  Sampling Phase-locked Loop (S-pll)  Reference (Ref) Feedthrough Suppression  Type-i  Type-ii  
A Reconfigurable CMOS Rectifier With 14-dB Power Dynamic Range Achieving >36-dB/mm FoM for RF-Based Hybrid Energy Harvesting Journal article
Choo, Alexander, Ramiah, Harikrishnan, Churchill, Kishore Kumar Pakkirisami, Chen, Yong, Mekhilef, Saad, Mak, Pui In, Martins, Rui P.. A Reconfigurable CMOS Rectifier With 14-dB Power Dynamic Range Achieving >36-dB/mm FoM for RF-Based Hybrid Energy Harvesting[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2022, 30(10), 1533-1537.
Authors:  Choo, Alexander;  Ramiah, Harikrishnan;  Churchill, Kishore Kumar Pakkirisami;  Chen, Yong;  Mekhilef, Saad; et al.
Favorite | TC[WOS]:17 TC[Scopus]:19  IF:2.8/2.8 | Submit date:2022/09/09
Cmos  Figure Of Merit (Fom)  Power Dynamic Range (Pdr)  Radio Frequency-based Hybrid Energy Harvesting (Rfheh)  
High-Performance Harmonic-Rich Single-Core VCO with Multi-LC Tank: A Tutorial Journal article
Chen, Yong, Mak, Pui In, Martins, Rui P.. High-Performance Harmonic-Rich Single-Core VCO with Multi-LC Tank: A Tutorial[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2022, 69(7), 3115-3121.
Authors:  Chen, Yong;  Mak, Pui In;  Martins, Rui P.
Favorite | TC[WOS]:34 TC[Scopus]:39  IF:4.0/3.7 | Submit date:2022/08/02
1/f3phase-noise Corner  Cmos  Common-mode (Cm)  Differential-mode (Dm)  Figure-of-merit (Fom)  Impulse Sensitivity Function (Isf)  Resistor-inductor-capacitor-mutual Inductance (Rlcm)  Voltage-controlled Oscillator (Vco)  
Fully-Integrated Timers for Ultra-Low-Power Internet-of-Things Nodes - Fundamentals and Design Techniques Review article
2022
Authors:  Loo, Mikki How Wen;  Ramiah, Harikrishnan;  Lei, Ka Meng;  Lim, Chee Cheow;  Lai, Nai Shyan; et al.
Favorite | TC[WOS]:6 TC[Scopus]:8  IF:3.4/3.7 | Submit date:2022/09/09
Allan Deviation  Cmos  Figure-of-merit (Fom)  Frequency-locked-loop (Fll)  Internet-of-things (Iot)  Jitter  Phase Noise  Relaxation Oscillator (Rxo)  Ultra-low-power  Wakeup Timers