×
验证码:
换一张
Forgotten Password?
Stay signed in
Login With UMPASS
English
|
繁體
Login With UMPASS
Log In
ALL
ORCID
TI
AU
PY
SU
KW
TY
JN
DA
IN
PB
FP
ST
SM
Study Hall
Image search
Paste the image URL
Home
Faculties & Institutes
Scholars
Publications
Subjects
Statistics
News
Search in the results
Faculties & Institutes
INSTITUTE OF MIC... [7]
Faculty of Scien... [7]
THE STATE KEY LA... [3]
THE STATE KEY LA... [1]
Authors
SIN SAI WENG [4]
LU YAN [4]
RUI PAULO DA SIL... [3]
U SENG PAN [1]
ZHANG HONGCAI [1]
GUO MINGQIANG [1]
More...
Document Type
Journal article [10]
Conference paper [2]
Date Issued
2024 [1]
2023 [2]
2021 [1]
2019 [4]
2018 [1]
2016 [1]
More...
Language
英語English [11]
Source Publication
IEEE Journal of ... [5]
2018 Internation... [1]
ANALOG INTEGRATE... [1]
Analog Integrate... [1]
Conference Proce... [1]
IEEE Transaction... [1]
More...
Indexed By
SCIE [9]
CPCI-S [1]
Funding Organization
Funding Project
×
Knowledge Map
UM
Start a Submission
Submissions
Unclaimed
Claimed
Attach Fulltext
Bookmarks
Browse/Search Results:
1-10 of 12
Help
Selected(
0
)
Clear
Items/Page:
5
10
15
20
25
30
35
40
45
50
55
60
65
70
75
80
85
90
95
100
Sort:
Select
Issue Date Ascending
Issue Date Descending
Title Ascending
Title Descending
Author Ascending
Author Descending
WOS Cited Times Ascending
WOS Cited Times Descending
Submit date Ascending
Submit date Descending
Journal Impact Factor Ascending
Journal Impact Factor Descending
A Quad-Slope 70V GaN Gate Driver with Integrated Three-Mode Level Shifter for Enhanced Negative Voltage Tolerance, dV/dt Detection and Double-Edge Self-Triggered Delay Compensation
Conference paper
Liu, Tianqi, Gao, Qiang, Martins, Rui P., Lu, Yan. A Quad-Slope 70V GaN Gate Driver with Integrated Three-Mode Level Shifter for Enhanced Negative Voltage Tolerance, dV/dt Detection and Double-Edge Self-Triggered Delay Compensation[C]:Institute of Electrical and Electronics Engineers Inc., 2024, 1141-1145.
Authors:
Liu, Tianqi
;
Gao, Qiang
;
Martins, Rui P.
;
Lu, Yan
Favorite
|
TC[WOS]:
0
TC[Scopus]:
0
|
Submit date:2024/06/05
Delay Compensation
Dv/dt Detection
Gan
Gate Driver
Negative Voltage
A Two-Channel Time-Interleaved Continuous-Time Third-Order CIFF-Based Delta-Sigma Modulator
Journal article
Yue Hu, Yuekai Liu, Xinyu Qin, Yan Liu, Mingqiang Guo, Sai-Weng Sin, Guoxing Wang, Yong Lian, Liang Qi. A Two-Channel Time-Interleaved Continuous-Time Third-Order CIFF-Based Delta-Sigma Modulator[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2023, 1-13.
Authors:
Yue Hu
;
Yuekai Liu
;
Xinyu Qin
;
Yan Liu
;
Mingqiang Guo
; et al.
Adobe PDF
|
Favorite
|
TC[WOS]:
2
TC[Scopus]:
2
IF:
5.2
/
4.5
|
Submit date:2023/08/22
Continuous-time Delta-sigma Modulator (Dsm)
Time-interleaved (Ti)
Cascaded Integrator Of Distributed Feedforward (Ciff)
Excess Loop Delay (Eld) Compensation
Membership-function-based Secondary Frequency Regulation for Distributed Energy Resources in Islanded Microgrids with Communication Delay Compensation
Journal article
Jinshuo Su, Hongcai Zhang, Hui Liu, Lei Yu, Zhukui Tan. Membership-function-based Secondary Frequency Regulation for Distributed Energy Resources in Islanded Microgrids with Communication Delay Compensation[J]. IEEE Transactions on Sustainable Energy, 2023, 14(4), 2274 - 2293.
Authors:
Jinshuo Su
;
Hongcai Zhang
;
Hui Liu
;
Lei Yu
;
Zhukui Tan
Favorite
|
TC[WOS]:
12
TC[Scopus]:
17
IF:
8.6
/
8.6
|
Submit date:2023/07/12
Communication Delay Compensation
Islanded Microgrids
Distributed Energy Resources
Distribution-level Phasor Measurement Units
Secondary Frequency Regulation
A −40–125 °C, 0.8 V, 33 kHz relaxation oscillator with integrated voltage and current reference and compensated comparator delay
Journal article
Lidan Wang, Chenchang Zhan, Zhaobo Zhang, Shuangxing Zhao. A −40–125 °C, 0.8 V, 33 kHz relaxation oscillator with integrated voltage and current reference and compensated comparator delay[J]. Microelectronics Journal, 2021, 117, 105285.
Authors:
Lidan Wang
;
Chenchang Zhan
;
Zhaobo Zhang
;
Shuangxing Zhao
Favorite
|
TC[WOS]:
4
TC[Scopus]:
5
IF:
1.9
/
1.7
|
Submit date:2021/12/08
Delay
Temperature Compensation
Voltage And Current Reference
—relaxation Oscillator
A 76.6-dB-SNDR 50-MHz-BW 29.2-mW Multi-Bit CT Sturdy MASH with DAC Non-Linearity Tolerance
Journal article
Qi,Liang, Jain,Ankesh, Jiang,Dongyang, Sin,Sai Weng, Martins,Rui P., Ortmanns,Maurits. A 76.6-dB-SNDR 50-MHz-BW 29.2-mW Multi-Bit CT Sturdy MASH with DAC Non-Linearity Tolerance[J]. IEEE Journal of Solid-State Circuits, 2019, 55(2), 344-355.
Authors:
Qi,Liang
;
Jain,Ankesh
;
Jiang,Dongyang
;
Sin,Sai Weng
;
Martins,Rui P.
; et al.
Favorite
|
TC[WOS]:
54
TC[Scopus]:
48
IF:
4.6
/
5.6
|
Submit date:2021/03/09
Analog-to-digital Converter (Adc)
Continuous Time (Ct)
Digital-to-analog Converter (Dac) Linearization
Excess Loop Delay (Eld) Compensation
Filter
Finite-impulse Response (Fir)
Multibit Quantization
Noise Coupling (Nc)
Sturdy Multistage Noise-shaping (Smash)
Successive-approximation Register (Sar)
A 76.6dB-SNDR 50MHz-BW 29.2mW Multibit CT Sturdy MASH with DAC Non-Linearity Tolerance
Journal article
Qi, L., Jain, A., Jiang, D., Sin, S. W., Martins, R. P., Ortmanns, M.. A 76.6dB-SNDR 50MHz-BW 29.2mW Multibit CT Sturdy MASH with DAC Non-Linearity Tolerance[J]. IEEE Journal of Solid-State Circuits, 2019, 55(2), 344-355.
Authors:
Qi, L.
;
Jain, A.
;
Jiang, D.
;
Sin, S. W.
;
Martins, R. P.
; et al.
Favorite
|
TC[WOS]:
54
TC[Scopus]:
48
IF:
4.6
/
5.6
|
Submit date:2022/01/25
Analog-to-digital Converter (Adc)
Continuous Time (Ct)
Digital-to-analog Converter (Dac) Linearization
Excess Loop Delay (Eld) Compensation
Filter
Finite-impulse Response (Fir)
Multibit Quantization
Noise Coupling (Nc)
Sturdy Multistage Noise-shaping (Smash)
Successive-approximation Register (Sar)
A Reconfigurable Cross-Connected Wireless- Power Transceiver for Bidirectional Device-to-Device Wireless Charging
Journal article
Mao, F., Lu, Y., Martins, R. P.. A Reconfigurable Cross-Connected Wireless- Power Transceiver for Bidirectional Device-to-Device Wireless Charging[J]. IEEE Journal of Solid-State Circuits, 2019, 2579-2589.
Authors:
Mao, F.
;
Lu, Y.
;
Martins, R. P.
Favorite
|
IF:
4.6
/
5.6
|
Submit date:2022/01/25
Adaptive Deadtime Control
Delay-locked Loop (Dll)
Off-delay Compensation
Reconfigurable Cross-connected (Cc) Wireless Power Transceiver Trx
Tunable Capacitor
Zero-voltage Switching (Zvs)
A Reconfigurable Cross-Connected Wireless-Power Transceiver for Bidirectional Device-to-Device Wireless Charging
Journal article
Mao,Fangyu, Lu,Yan, Martins,Rui P.. A Reconfigurable Cross-Connected Wireless-Power Transceiver for Bidirectional Device-to-Device Wireless Charging[J]. IEEE Journal of Solid-State Circuits, 2019, 54(9), 2579-2589.
Authors:
Mao,Fangyu
;
Lu,Yan
;
Martins,Rui P.
Favorite
|
TC[WOS]:
29
TC[Scopus]:
36
IF:
4.6
/
5.6
|
Submit date:2021/03/09
Adaptive Deadtime Control
Delay-locked Loop (Dll)
Off-delay Compensation
Reconfigurable Cross-connected (Cc) Wireless Power Transceiver Trx
Tunable Capacitor
Zero-voltage Switching (Zvs) Turn-on
A 6.78 MHz active voltage doubler with near-optimal on/off delay compensation for wireless power transfer systems
Conference paper
Mao F., Lu Y., Seng-Pan U., Martins R.P.. A 6.78 MHz active voltage doubler with near-optimal on/off delay compensation for wireless power transfer systems[C], 2018, 1-4.
Authors:
Mao F.
;
Lu Y.
;
Seng-Pan U.
;
Martins R.P.
Favorite
|
TC[WOS]:
1
TC[Scopus]:
3
|
Submit date:2019/02/11
Delay Compensation
Feedback Loop
Implantable Medical Devices
Real Time
Voltage Doubler
Wireless Power Transfer
Adaptive On/Off Delay-Compensated Active Rectifiers for Wireless Power Transfer Systems
Journal article
Cheng L., Ki W.-H., Lu Y., Yim T.-S.. Adaptive On/Off Delay-Compensated Active Rectifiers for Wireless Power Transfer Systems[J]. IEEE Journal of Solid-State Circuits, 2016, 51(3), 712-723.
Authors:
Cheng L.
;
Ki W.-H.
;
Lu Y.
;
Yim T.-S.
Favorite
|
TC[WOS]:
122
TC[Scopus]:
135
|
Submit date:2019/02/14
Active Rectifier
Comparator Delay
Delay Compensation
Inductive Coupling
Pvt Variations
Resonant Wireless Power Transfer (R-wpt)
Reverse Current Control