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A 56-Gb/s Reconfigurable Silicon-Photonics Transmitter Using High-Swing Distributed Driver and 2-Tap In-Segment Feed-Forward Equalizer in 65-nm CMOS
Journal article
He, Jian, Zhang, Yuguang, Liu, Han, Liao, Qiwen, Zhang, Zhao, Li, Miaofeng, Jiang, Fan, Shi, Jingbo, Liu, Jian, Wu, Nanjian, Chen, Yong, Chiang, Patrick Yin, Yu, Ningmei, Xiao, Xi, Qi, Nan. A 56-Gb/s Reconfigurable Silicon-Photonics Transmitter Using High-Swing Distributed Driver and 2-Tap In-Segment Feed-Forward Equalizer in 65-nm CMOS[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2022, 69(3), 1159-1170.
Authors:
He, Jian
;
Zhang, Yuguang
;
Liu, Han
;
Liao, Qiwen
;
Zhang, Zhao
; et al.
Favorite
|
TC[WOS]:
10
TC[Scopus]:
12
IF:
5.2
/
4.5
|
Submit date:2022/03/28
Artificial Transmission Line (t-Line)
Cmos
Distributed Driver
Extinction Ratio (Er)
Feed-forward Equalizer (Ffe)
High-swing
Mach-zehnder Modulator (Mzm)
Nrz
Optical Interconnects
Pam-4
Push-pull
Silicon-photonics
A 1.55-to-32-gb/s four-lane transmitter with 3-tap feed forward equalizer and shared pll in 28-nm cmos
Journal article
Cai, Chen, Zheng, Xuqiang, Chen, Yong, Wu, Danyu, Luan, Jian, Lu, Dechao, Zhou, Lei, Wu, Jin, Liu, Xinyu. A 1.55-to-32-gb/s four-lane transmitter with 3-tap feed forward equalizer and shared pll in 28-nm cmos[J]. Electronics (Switzerland), 2021, 10(16), 1873.
Authors:
Cai, Chen
;
Zheng, Xuqiang
;
Chen, Yong
;
Wu, Danyu
;
Luan, Jian
; et al.
Favorite
|
TC[WOS]:
3
TC[Scopus]:
4
IF:
2.6
/
2.6
|
Submit date:2021/10/28
Cmos
Feed-forward Equalizer (Ffe)
High-speed Serial Interface
Phase-locked Loop (Pll)
Transmitter (Tx)
Voltage-controlled Oscillator (Vco)
A 32-Gb/s 3.53-mW/Gb/s Adaptive Receiver AFE Employing a Hybrid CTLE, Edge-DFE and Merged Data-DFE/CDR in 65-nm CMOS
Conference paper
Arya Balachandran, Yong Chen, Chirn Chye Boon. A 32-Gb/s 3.53-mW/Gb/s Adaptive Receiver AFE Employing a Hybrid CTLE, Edge-DFE and Merged Data-DFE/CDR in 65-nm CMOS[C]:IEEE, 2019, 221-224.
Authors:
Arya Balachandran
;
Yong Chen
;
Chirn Chye Boon
Favorite
|
TC[Scopus]:
17
|
Submit date:2021/10/28
Cmos
Analog Front-end (Afe)
Low Frequency Equalization (Lfeq)
Inductorless
Continuous-time Linear Equalizer (Ctle)
Inductorless
Channel Loss
Decision Feedback Equalization (Dfe)
Receiver
A 0.013-mm(2) 0.53-mW/Gb/s 32-Gb/s Hybrid Analog Equalizer Under 21-dB Channel Loss in 65-nm CMOS
Journal article
Balachandran, Arya, Chen, Yong, Boon, Chirn Chye. A 0.013-mm(2) 0.53-mW/Gb/s 32-Gb/s Hybrid Analog Equalizer Under 21-dB Channel Loss in 65-nm CMOS[J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2018, 26(3), 599-603.
Authors:
Balachandran, Arya
;
Chen, Yong
;
Boon, Chirn Chye
Favorite
|
TC[WOS]:
16
TC[Scopus]:
18
IF:
2.8
/
2.8
|
Submit date:2018/10/30
Channel Loss
Cmos Equalizer
Continuous-time Linear Equalizer (Ctle)
Figure Of Merit (Fom)
Inductorless
Intersymbol Interference (Isi)
Low-frequency Equalization (Lfeq)
A 0.013-mm2 0.53-mW/Gb/s 32-Gb/s Hybrid Analog Equalizer under 21-dB Channel Loss in 65-nm CMOS
Journal article
Balachandran A., Chen Y., Boon C.C.. A 0.013-mm2 0.53-mW/Gb/s 32-Gb/s Hybrid Analog Equalizer under 21-dB Channel Loss in 65-nm CMOS[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2017, 26(3), 599-603.
Authors:
Balachandran A.
;
Chen Y.
;
Boon C.C.
Favorite
|
TC[WOS]:
16
TC[Scopus]:
18
|
Submit date:2019/02/14
Channel Loss
Cmos Equalizer
Continuoustime Linear Equalizer (Ctle)
Figure Of Merit (Fom)
Inductorless
Intersymbol Interference (Isi)
Low-frequency Equalization (Lfeq)
A Highly-scalable analog equalizer using a tunable and current-reusable for 10-Gb/s I/O Links
Journal article
Yong Chen, Pui-In Mak, Yan Wang. A Highly-scalable analog equalizer using a tunable and current-reusable for 10-Gb/s I/O Links[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2015, 23(5), 978-982.
Authors:
Yong Chen
;
Pui-In Mak
;
Yan Wang
Favorite
|
TC[WOS]:
15
TC[Scopus]:
24
IF:
2.8
/
2.8
|
Submit date:2019/02/12
Active Inductor
Analog Equalizer
Cmos
Eye-opening Rate
Jitter
Negative Miller Capacitor
Positive-feedback.