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Status | 已發表Published |
A 56-Gb/s Reconfigurable Silicon-Photonics Transmitter Using High-Swing Distributed Driver and 2-Tap In-Segment Feed-Forward Equalizer in 65-nm CMOS | |
He, Jian1; Zhang, Yuguang2; Liu, Han3; Liao, Qiwen4; Zhang, Zhao3; Li, Miaofeng5; Jiang, Fan6; Shi, Jingbo7; Liu, Jian3; Wu, Nanjian3; Chen, Yong8; Chiang, Patrick Yin9; Yu, Ningmei10; Xiao, Xi2; Qi, Nan3 | |
2022-03-01 | |
Source Publication | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS |
ISSN | 1549-8328 |
Volume | 69Issue:3Pages:1159-1170 |
Abstract | This article presents a reconfigurable silicon-photonics transmitter (TX) for short-reach optical interconnects. The proposed hybrid-integrated TX combines a 65-nm CMOS driver with a 180-nm SOI-CMOS silicon-photonic Mach-Zehnder Modulator (MZM). The driver integrated with in-segment fractional-UI spaced feed-forward equalizer (FFE) is proposed to support the non-return-zero (NRZ) signaling, electrical-and optical-domain 4-level pulse-amplitude modulation (PAM-4) signaling. The driver employs a reconfigurable distributed topology to achieve high swing, wide bandwidth and flexible operation. The MZM is driven differentially in a push-pull configuration for high modulation efficiency. Measurement results show that the proposed TX operates up to 50-Gb/s NRZ data rate with 4-Vppd swing and 1.92-ps RMS jitter. In the optical PAM-4 mode, it reaches 56-Gb/s data rate and achieves >5-dB extinction ratio (ER) at the cost of 10.9-pJ/bit power efficiency. |
Keyword | Artificial Transmission Line (t-Line) Cmos Distributed Driver Extinction Ratio (Er) Feed-forward Equalizer (Ffe) High-swing Mach-zehnder Modulator (Mzm) Nrz Optical Interconnects Pam-4 Push-pull Silicon-photonics |
DOI | 10.1109/TCSI.2021.3127723 |
URL | View the original |
Indexed By | SCIE |
Language | 英語English |
WOS Research Area | Engineering |
WOS Subject | Engineering, Electrical & Electronic |
WOS ID | WOS:000732322900001 |
Scopus ID | 2-s2.0-85120908972 |
Fulltext Access | |
Citation statistics | |
Document Type | Journal article |
Collection | INSTITUTE OF MICROELECTRONICS |
Corresponding Author | Xiao, Xi; Qi, Nan |
Affiliation | 1.Faculty of Automation and Information Engineering, Xi'an University of Technology, Xi'an, 710048, China 2.State Key Laboratory of Optical Communication Technologies and Networks, Wuhan Research Institute of Posts and Telecommunications, Wuhan, 430074, China 3.State Key Laboratory of Superlattices and Microstructures, Institute of Semiconductors, Chinese Academy of Sciences, Beijing, 100083, China 4.Changsha Hengding Information Technologies, Changsha, 410221, China 5.Alibaba Cloud, Alibaba Group, Hangzhou, 311121, China 6.Suzhou Acela Micro Company Ltd., Suzhou, 430070, China 7.State Key Laboratory of Superlattices and Microstructures, Institute of Semiconductors, Chinese Academy of Sciences, Beijing, 100871, China 8.State-Key Laboratory of Analog and Mixed-Signal Vlsi and IME/ECE-FST, University of Macau, Taipa, Macao 9.School of Microelectronics, Fudan University, Shanghai, 200433, China 10.Faculty of Automation and Information Engineering, Xi'an University of Technology, Xi'an, 710048, China |
Recommended Citation GB/T 7714 | He, Jian,Zhang, Yuguang,Liu, Han,et al. A 56-Gb/s Reconfigurable Silicon-Photonics Transmitter Using High-Swing Distributed Driver and 2-Tap In-Segment Feed-Forward Equalizer in 65-nm CMOS[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2022, 69(3), 1159-1170. |
APA | He, Jian., Zhang, Yuguang., Liu, Han., Liao, Qiwen., Zhang, Zhao., Li, Miaofeng., Jiang, Fan., Shi, Jingbo., Liu, Jian., Wu, Nanjian., Chen, Yong., Chiang, Patrick Yin., Yu, Ningmei., Xiao, Xi., & Qi, Nan (2022). A 56-Gb/s Reconfigurable Silicon-Photonics Transmitter Using High-Swing Distributed Driver and 2-Tap In-Segment Feed-Forward Equalizer in 65-nm CMOS. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 69(3), 1159-1170. |
MLA | He, Jian,et al."A 56-Gb/s Reconfigurable Silicon-Photonics Transmitter Using High-Swing Distributed Driver and 2-Tap In-Segment Feed-Forward Equalizer in 65-nm CMOS".IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS 69.3(2022):1159-1170. |
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