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A Miniature Multinuclei NMR/MRI Platform with a High-Voltage SOI ASIC Journal article
Fan, Shuhao, Zhou, Qi, Lei, Ka Meng, Martins, Rui P., Mak, Pui In. A Miniature Multinuclei NMR/MRI Platform with a High-Voltage SOI ASIC[J]. IEEE Journal of Solid-State Circuits, 2024.
Authors:  Fan, Shuhao;  Zhou, Qi;  Lei, Ka Meng;  Martins, Rui P.;  Mak, Pui In
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:4.6/5.6 | Submit date：2024/12/05
1h/19f-magnetic Resonance Imaging (Mri) Tracking  Application-specific Integrated Circuit (Asic)  Composite Rf Pulses  High-voltage (Hv) Isolation Switches  Hv Power Amplifier (Hv-pa)  Hv Silicon-on-insulator (Hv-soi)  Nuclear Magnetic Resonance (Nmr)  Nmr/mri-on-a-chip  Phase Interpolation (Pi)  
Fully Symmetrical Obfuscated Interconnection and Weak-PUF-Assisted Challenge Obfuscation Strong PUFs Against Machine-Learning Modeling Attacks Journal article
Xu, Chongyao, Zhang, Litao, Mak, Pui In, Martins, Rui P., Law, Man Kay. Fully Symmetrical Obfuscated Interconnection and Weak-PUF-Assisted Challenge Obfuscation Strong PUFs Against Machine-Learning Modeling Attacks[J]. IEEE Transactions on Information Forensics and Security, 2024, 19, 3927-3942.
Authors:  Xu, Chongyao;  Zhang, Litao;  Mak, Pui In;  Martins, Rui P.;  Law, Man Kay
Favorite | TC[WOS]:2 TC[Scopus]:4  IF:6.3/7.3 | Submit date：2024/05/16
Physical Unclonable Function (Puf)  Machine Learning (Ml)  Modeling Attack  Symmetrical Obfuscated Interconnection (Soi)  Challenge Obfuscation  Reverse Engineering (Re)  
A Systematic Review of Voltage Reference Circuits: Spanning Room Temperature to Cryogenic Applications Review article
2024
Authors:  Deng, Chen;  Wu, Sai;  Liu, Chengcheng;  Peng, Yatao;  Law, Man Kay; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:5.2/4.5 | Submit date：2024/12/26
Bjt  Cmos  Cryogenic Temperature  Dtmos  Fd-soi  Quantum Controller  Reference Circuits  Sige  
A Miniaturized 3-D-MRI Scanner Featuring an HV-SOI ASIC and Achieving a 10 × 8 × 8 mm3Field of View Journal article
Fan, Shuhao, Zhou, Qi, Lei, Ka Meng, Mak, Pui In, Martins, Rui P.. A Miniaturized 3-D-MRI Scanner Featuring an HV-SOI ASIC and Achieving a 10 × 8 × 8 mm3Field of View[J]. IEEE Journal of Solid-State Circuits, 2022, 58(7), 2028 - 2039.
Authors:  Fan, Shuhao;  Zhou, Qi;  Lei, Ka Meng;  Mak, Pui In;  Martins, Rui P.
Favorite | TC[WOS]:9 TC[Scopus]:8  IF:4.6/5.6 | Submit date：2023/01/30
3-d Gradient Controller  Application-specific Integrated Circuit (Asic)  Dynamic-threshold Mosfet (Dtmos)  High-voltage Power Amplifier (Hv-pa)  Low-noise Amplifier (Lna)  Magnetic Resonance Imaging (Mri)  Mri-ona-chip  Silicon-on-insulator (Soi)  Transceiver (Trx)  
A SAW-Less Tunable RF Front End for FDD and IBFD Combining an Electrical-Balance Duplexer and a Switched-LC N-Path LNA Journal article
Qi, Gengzhen, van Liempd, Barend, Mak, Pui-In, Martins, Rui P., Craninckx, Jan. A SAW-Less Tunable RF Front End for FDD and IBFD Combining an Electrical-Balance Duplexer and a Switched-LC N-Path LNA[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2018, 53(5), 1431-1442.
Authors:  Qi, Gengzhen;  van Liempd, Barend;  Mak, Pui-In;  Martins, Rui P.;  Craninckx, Jan
Favorite | TC[WOS]:66 TC[Scopus]:71  IF:4.6/5.6 | Submit date：2018/10/30
Electrical-balance Duplexer (Ebd)  In-band Full Duplex (Ibfd)  Local Thermal Equilibrium (Lte)-frequency-division Duplexing (Fdd)  Low-noise Amplifier (Lna)  Rf Front-end (Rf-fe)  Soi Cmos  Switched-lc N-path Filtering  Tunable  
A novel SOI-based single proof-mass 3-axis accelerometer with gap-closing differential capacitive electrodes in all sensing directions Conference paper
Hsu C.-P., Hsu Y.-C., Yip M.-C., Fang W.. A novel SOI-based single proof-mass 3-axis accelerometer with gap-closing differential capacitive electrodes in all sensing directions[C], 2010, 1188-1191.
Authors:  Hsu C.-P.;  Hsu Y.-C.;  Yip M.-C.;  Fang W.
Favorite | TC[WOS]:8 TC[Scopus]:8 | Submit date：2019/04/08
3-axis Accelerometer  Gap Closing Electrode  Single Proof-mass  Soi  
A novel SOI Z-axis accelerometer with gap closing differential sensing electrodes Conference paper
Hsu C.-P., Yip M.-C., Fang W.. A novel SOI Z-axis accelerometer with gap closing differential sensing electrodes[C], 2009, 1154-1157.
Authors:  Hsu C.-P.;  Yip M.-C.;  Fang W.
Favorite | TC[Scopus]:4 | Submit date：2019/04/08
Accelerometer  Gap Closing  Soi  
Novel local silicon-gate carbon nanotube transistors combining silicon-on-insulator technology for integration Journal article
Zhang M., Chan P.C.H., Chai Y., Liang Q., Tang Z.K.. Novel local silicon-gate carbon nanotube transistors combining silicon-on-insulator technology for integration[J]. IEEE Transactions on Nanotechnology, 2009, 8(2), 260-268.
Authors:  Zhang M.;  Chan P.C.H.;  Chai Y.;  Liang Q.;  Tang Z.K.
Favorite | TC[WOS]:8 TC[Scopus]:8 | Submit date：2019/04/08
Carbon Nanotube (Cnt)  Carbon Nanotube Fet (cnFet)  Integration  Nanotechnology  Silicon-on-insulator (Soi)