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A Second-Order NS Pipelined SAR ADC with Quantization-Prediction-Unrolled Gain Error Shaping and Fully Passive Integrator Journal article
Zhang, Hongshuai, Zhu, Yan, Martins, Rui P., Chan, Chi Hang. A Second-Order NS Pipelined SAR ADC with Quantization-Prediction-Unrolled Gain Error Shaping and Fully Passive Integrator[J]. IEEE Journal of Solid-State Circuits, 2023, 58(12), 3565-3575.
Authors:  Zhang, Hongshuai;  Zhu, Yan;  Martins, Rui P.;  Chan, Chi Hang
Favorite | TC[WOS]:2 TC[Scopus]:4  IF:4.6/5.6 | Submit date：2024/01/02
Analog-to-digital Converter (Adc)  Auxiliary Noise Shaping (Ns) Successive-approximation Register (Sar) Adc  Capacitor Stacking  Data-weighted Averaging And detect-And-skip (Dwa And Das)  Differential Sampling  Energy Efficient  Error SupprEssion (Es) And Reconstruction  Gain Error Shaping (Ges)  Partial Time Interleaving  Passive Ns  Pipelined Sar  Quantization Predication Unrolled  Two-step Floating Inverter Amplifier (Fia)  
A 14b 500 MS/s Single-Channel Pipelined-SAR ADC With Reference Ripple Mitigation Techniques and Adaptively Biased Floating Inverter Amplifier Journal article
Jiang,Wenning, Chen,Chixiao, Liu,Qi, Liu,Ming, Zhu,Yan, Chan,Chi Hang, Xu,Hao, Martins,Rui P.. A 14b 500 MS/s Single-Channel Pipelined-SAR ADC With Reference Ripple Mitigation Techniques and Adaptively Biased Floating Inverter Amplifier[J]. IEEE Journal of Solid-State Circuits, 2023, 58(10), 2709 - 2721.
Authors:  Jiang,Wenning;  Chen,Chixiao;  Liu,Qi;  Liu,Ming;  Zhu,Yan; et al.
Favorite | TC[WOS]:4 TC[Scopus]:3  IF:4.6/5.6 | Submit date：2023/08/03
Adaptive Bias  Analog-to-digital Converter (Adc)  Floating Inverter Amplifier (Fia)  Pipelined-successive-approximation-register (Sar) Adc  Reference Ripple Cancellation (Rrc)  Reference Ripple Neutralization (Rrn)  
A 79.5dB-SNDR Pipelined-SAR ADC with a Linearity-Shifting 32× Dynamic Amplifier and Mounted-Over-Die Bypass Capacitors Conference paper
Zhang, Minglei, Cao, Yuefeng, Zhu, Yan, Chan, Chi-Hang, Martins, R. P.. A 79.5dB-SNDR Pipelined-SAR ADC with a Linearity-Shifting 32× Dynamic Amplifier and Mounted-Over-Die Bypass Capacitors[C]:Institute of Electrical and Electronics Engineers Inc., 2023.
Authors:  Zhang, Minglei;  Cao, Yuefeng;  Zhu, Yan;  Chan, Chi-Hang;  Martins, R. P.
Favorite | TC[Scopus]:2 | Submit date：2023/07/12
Dynamic Amplifier  Residue Amplifier  Pipelined-sar Adc  Linearization Technique  Bypass Capacitor  
An Inherent Gain Error Tolerance Noise-Shaping SAR-Assisted Pipeline ADC with Code-Counter-Based Offset Calibration Journal article
Zhang, Hongshuai, Zhu, Yan, Chan, Chi Hang, Martins, Rui P.. An Inherent Gain Error Tolerance Noise-Shaping SAR-Assisted Pipeline ADC with Code-Counter-Based Offset Calibration[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2022, 57(5), 1480-1491.
Authors:  Zhang, Hongshuai;  Zhu, Yan;  Chan, Chi Hang;  Martins, Rui P.
Favorite | TC[WOS]:8 TC[Scopus]:10  IF:4.6/5.6 | Submit date：2022/05/13
Amplifier Linearity Enhancement  Analog-to-digital Converter (Adc)  Background Offset Calibration  Digital Reconstruction Filter  Dwa  Energy And Area Efficient  Inherent Gain Error Tolerant  Inter-stage Gain Error  Noise Shaping (Ns)  Oversampling  Partial Interleaving  Pipelined Successive Approximation (Sar)  Quantization Leakage Error  
An Auxiliary-Channel-Sharing Background Distortion and Gain CalibrationAchieving >8dB SFDR Improvement over 4th Nyquist Zone in 1GS/s ADC Conference paper
Wei, L., Zheng, Z., Markulic, N., Lagos, J., Martens, E., Zhu, Y., Chan, C. H., Craninckx, J., Martins, R. P.. An Auxiliary-Channel-Sharing Background Distortion and Gain CalibrationAchieving >8dB SFDR Improvement over 4th Nyquist Zone in 1GS/s ADC[C], 2021.
Authors:  Wei, L.;  Zheng, Z.;  Markulic, N.;  Lagos, J.;  Martens, E.; et al.
Favorite |  | Submit date：2022/01/25
Background Calibration  Nonlinearity  Pipelined Adc  Split-sar Adc  
An Auxiliary-Channel-Sharing Background Distortion and Gain Calibration Achieving >8dB SFDR Improvement over 4thNyquist Zone in 1GS/s ADC Conference paper
Wei, Lai, Zheng, Zihao, Markulic, Nereo, Lagos, Jorge, Martens, Ewout, Zhu, Yan, Chan, Chi Hang, Craninckx, Jan, Martins, Rui Paulo. An Auxiliary-Channel-Sharing Background Distortion and Gain Calibration Achieving >8dB SFDR Improvement over 4thNyquist Zone in 1GS/s ADC[C], 2021.
Authors:  Wei, Lai;  Zheng, Zihao;  Markulic, Nereo;  Lagos, Jorge;  Martens, Ewout; et al.
Favorite | TC[Scopus]:3 | Submit date：2021/09/20
Background Calibration  Nonlinearity  Pipelined Adc  Split-sar Adc  
Background Calibration of Bit Weights in Pipelined-SAR ADCs Using Paired Comparators Journal article
Sun, Jie, Zhang, Minglei, Qiu, Lei, Wu, Jianhui, Liu, Weiqiang. Background Calibration of Bit Weights in Pipelined-SAR ADCs Using Paired Comparators[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2020, 28(4), 1074-1078.
Authors:  Sun, Jie;  Zhang, Minglei;  Qiu, Lei;  Wu, Jianhui;  Liu, Weiqiang
Favorite | TC[WOS]:14 TC[Scopus]:18  IF:2.8/2.8 | Submit date：2021/10/28
Background Calibration  Bit Weight  Dither Injection  Pipelined Sar Adc  Residue Increment  
16.3 A Single-Channel 5.5mW 3.3GS/s 6b Fully Dynamic Pipelined ADC with Post-Amplification Residue Generation Conference paper
Zheng, Z., Wei, W., Lagos, J., Martens, E., Zhu, Y., Chan, C. H., Craninckx, J., Martins, R. P.. 16.3 A Single-Channel 5.5mW 3.3GS/s 6b Fully Dynamic Pipelined ADC with Post-Amplification Residue Generation[C], 2020.
Authors:  Zheng, Z.;  Wei, W.;  Lagos, J.;  Martens, E.;  Zhu, Y.; et al.
Favorite |  | Submit date：2022/01/25
Amplifiers  Analogue-digital Conversion  Calibration  Interpolation  Dynamic Pipelined Adc  Dynamic Pipelined Architecture  Linearized Dynamic Amplifier  Post-amplification Residue Generation Scheme  Residue Amplification  Complex Residue-transferring Realization  Residue Amplifier  Power Consumption  Sar Adc  Calibration Complexity  Aggressive Interpolation Factor  Flash Adc  Mm-wave 5g Receivers  Adc-based Serial Links  Power 5.5 Mw  Calibration  Quantization (Signal)  Clocks  System-on-chip  Interpolation  Prototype  
A Temperature-Stabilized Single-Channel 1-GS/s 60-dB SNDR SAR-Assisted Pipelined ADC with Dynamic Gm-R-Based Amplifier Journal article
Jiang,Wenning, Zhu,Yan, Zhang,Minglei, Chan,Chi Hang, Martins,Rui Paulo. A Temperature-Stabilized Single-Channel 1-GS/s 60-dB SNDR SAR-Assisted Pipelined ADC with Dynamic Gm-R-Based Amplifier[J]. IEEE Journal of Solid-State Circuits, 2020, 55(2), 322-332.
Authors:  Jiang,Wenning;  Zhu,Yan;  Zhang,Minglei;  Chan,Chi Hang;  Martins,Rui Paulo
Favorite | TC[WOS]:42 TC[Scopus]:51  IF:4.6/5.6 | Submit date：2021/03/09
Analog-to-digital Converter (Adc)  Gm-r Amplifier  Pipelined-successive Approximation Register (Sar) Adc  Residue Amplifier (Ra)  Sar  Sar-assisted Pipelined Adc  Temperature Compensation  
An 11-bit 100-MS/s Pipelined-SAR ADC Reusing PVT-Stabilized Dynamic Comparator in 65-nm CMOS Journal article
Zhang, Jin, Ren, Xiaoqian, Liu, Shubin, Chan, Chi Hang, Zhu, Zhangming. An 11-bit 100-MS/s Pipelined-SAR ADC Reusing PVT-Stabilized Dynamic Comparator in 65-nm CMOS[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2019, 67(7), 1174-1178.
Authors:  Zhang, Jin;  Ren, Xiaoqian;  Liu, Shubin;  Chan, Chi Hang;  Zhu, Zhangming
Favorite | TC[WOS]:9 TC[Scopus]:18  IF:4.0/3.7 | Submit date：2021/12/06
Analog-to-digital Converter (Adc)  Full Dynamic Adc  Pipelined Successive-approximation-register (Sar)  Pvt-stabilized Dynamic Amplification  Reused Comparator