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An Auxiliary-Channel-Sharing Background Distortion and Gain CalibrationAchieving >8dB SFDR Improvement over 4th Nyquist Zone in 1GS/s ADC
Wei, L.; Zheng, Z.; Markulic, N.; Lagos, J.; Martens, E.; Zhu, Y.; Chan, C. H.; Craninckx, J.; Martins, R. P.
2021-06-15
Conference NameAn Auxiliary-Channel-Sharing Background Distortion and Gain CalibrationAchieving >8dB SFDR Improvement over 4th Nyquist Zone in 1GS/s ADC
Source PublicationProceeding of 2021 Symposium on VLSI
Conference Date2021-06-15
Conference PlaceN/A
Abstract

This paper presents an auxiliary-channel-assisted background calibration for ADC’s input front-end (buffer + T/H) distortion and inter-stage gain error. The auxiliary channel is custom-designed which runs at a fractional speed of the main ADC with only moderate noise performance but high linearity. It also has a pseudo-inter-stage gain characteristic as the main ADC, which incorporates with the multi-layer LMS procedure, facilitating a fast convergence speed. Verified in a 12-bit 1GS/s pipelined SAR ADC in 28nm CMOS, the SNDR and SFDR at Nyquist input are 59.28 dB and 67.09 dB SFDR, respectively. Just the distortion calibrations alone contribute >11.13dB SFDR improvement in the entire Nyquist band. Both the ADCs and input buffers work under a 1V supply, consuming 19.2mW with 17% from the buffer

KeywordBackground Calibration Nonlinearity Pipelined Adc Split-sar Adc
URLView the original
Language英語English
The Source to ArticlePB_Publication
Document TypeConference paper
CollectionUniversity of Macau
Corresponding AuthorChan, C. H.
Recommended Citation
GB/T 7714
Wei, L.,Zheng, Z.,Markulic, N.,et al. An Auxiliary-Channel-Sharing Background Distortion and Gain CalibrationAchieving >8dB SFDR Improvement over 4th Nyquist Zone in 1GS/s ADC[C], 2021.
APA Wei, L.., Zheng, Z.., Markulic, N.., Lagos, J.., Martens, E.., Zhu, Y.., Chan, C. H.., Craninckx, J.., & Martins, R. P. (2021). An Auxiliary-Channel-Sharing Background Distortion and Gain CalibrationAchieving >8dB SFDR Improvement over 4th Nyquist Zone in 1GS/s ADC. Proceeding of 2021 Symposium on VLSI.
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