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THE STATE KEY LA... [2]
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CHEN YONG [2]
MAK PUI IN [1]
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A 0.003-mm2440fsRMS-Jitter and -64dBc-Reference-Spur Ring-VCO-Based Type-I PLL Using a Current-Reuse Sampling Phase Detector in 28-nm CMOS
Journal article
Zunsong Yang, Yong Chen, Pui In Mak, Rui P. Martins. A 0.003-mm2440fsRMS-Jitter and -64dBc-Reference-Spur Ring-VCO-Based Type-I PLL Using a Current-Reuse Sampling Phase Detector in 28-nm CMOS[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2021, 68(6), 2307-2316.
Authors:
Zunsong Yang
;
Yong Chen
;
Pui In Mak
;
Rui P. Martins
Favorite
|
TC[WOS]:
13
TC[Scopus]:
15
IF:
5.2
/
4.5
|
Submit date:2021/09/20
Cmos
Current-reuse Sampling Phase Detector (Crs-pd)
Integrated Jitter
Loop Filter (Lf)
Master-slave Sampling Filter (Mssf)
Master-slave Sampling Phase Detector (Mss-pd)
Phase Noise (Pn)
Phase-locked Loop (Pll)
Reference Spur
Ring Voltage-controlled Oscillator (Vco)
Type-i
Type-ii
Analysis and verification of jitter in bang-bang clock and data recovery circuit with a second-order loop filter
Journal article
Ge,Xinyi, Chen,Yong, Zhao,Xiaoteng, Mak,Pui In, Martins,Rui P.. Analysis and verification of jitter in bang-bang clock and data recovery circuit with a second-order loop filter[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2019, 27(10), 2223-2236.
Authors:
Ge,Xinyi
;
Chen,Yong
;
Zhao,Xiaoteng
;
Mak,Pui In
;
Martins,Rui P.
Favorite
|
TC[WOS]:
19
TC[Scopus]:
19
IF:
2.8
/
2.8
|
Submit date:2021/03/09
Bang-bang Clock And Data Recovery (Bbcdr)
Bang-bang Phase Detector (Bbpd)
Binary
Fourier Series
Jitter Generation (Jgen)
Jitter Tolerance (Jtol)
Jitter Transfer Function (Jtf)
Linear Phase Detector
Loop Filter (Lf)
Sinking Area