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Recursive locally minimum-variance filtering for two-dimensional systems: When dynamic quantization effect meets random sensor failure Journal article
Fan Wang, Zidong Wang, Jinling Liang, Carlos Silvestre. Recursive locally minimum-variance filtering for two-dimensional systems: When dynamic quantization effect meets random sensor failure[J]. Automatica, 2022, 148, 110762.
Authors:  Fan Wang;  Zidong Wang;  Jinling Liang;  Carlos Silvestre
Favorite | TC[WOS]:13 TC[Scopus]:14  IF:4.8/6.0 | Submit date：2023/02/22
Two-dimensional Systems  Recursive Filter  Dynamic Quantization  Sensor Failure  Monotonicity  Boundedness  
A 1.2-A Calibration-Free Hybrid LDO With In-Loop Quantization and Auxiliary Constant Current Control Achieving High Accuracy and Fast DVS Journal article
Xiangyu Mao, Yan Lu, Rui P. Martins. A 1.2-A Calibration-Free Hybrid LDO With In-Loop Quantization and Auxiliary Constant Current Control Achieving High Accuracy and Fast DVS[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2022, 69(11), 4443-4452.
Authors:  Xiangyu Mao;  Yan Lu;  Rui P. Martins
Favorite | TC[WOS]:6 TC[Scopus]:7  IF:5.2/4.5 | Submit date：2022/09/09
Calibration  Codes  Digital  Distributed Power Delivery  Dynamic Voltage And Frequency Scaling (Dvfs)  Fully-integrated Voltage Regulator (Fivr)  Hybrid Control  Hybrid Power Systems  Low-dropout Regulator (Ldo)  Power Transistors  Quantization (Signal)  Thermometers  Voltage Control  
A 3.3-GS/s 6-b Fully Dynamic Pipelined ADC With Linearized Dynamic Amplifier Journal article
Zihao Zheng, Lai Wei, Jorge Lagos, Ewout Martens, Yan Zhu, Chi Hang Chan, Jan Craninckx, Rui P. Martins. A 3.3-GS/s 6-b Fully Dynamic Pipelined ADC With Linearized Dynamic Amplifier[J]. IEEE Journal of Solid-State Circuits, 2021.
Authors:  Zihao Zheng;  Lai Wei;  Jorge Lagos;  Ewout Martens;  Yan Zhu; et al.
Favorite | TC[WOS]:8 TC[Scopus]:9  IF:4.6/5.6 | Submit date：2021/09/20
Analog-to-digital Conversion  Calibration  Calibration  Dynamic Amplifier (Da)  Hardware  Linearity  Linearization Technique  Pipeline Processing  Pipelined Analog-to-digital Converter (Adc).  Quantization (Signal)  Signal Resolution  System-on-chip  
16.3 A Single-Channel 5.5mW 3.3GS/s 6b Fully Dynamic Pipelined ADC with Post-Amplification Residue Generation Conference paper
Zheng, Z., Wei, W., Lagos, J., Martens, E., Zhu, Y., Chan, C. H., Craninckx, J., Martins, R. P.. 16.3 A Single-Channel 5.5mW 3.3GS/s 6b Fully Dynamic Pipelined ADC with Post-Amplification Residue Generation[C], 2020.
Authors:  Zheng, Z.;  Wei, W.;  Lagos, J.;  Martens, E.;  Zhu, Y.; et al.
Favorite |  | Submit date：2022/01/25
Amplifiers  Analogue-digital Conversion  Calibration  Interpolation  Dynamic Pipelined Adc  Dynamic Pipelined Architecture  Linearized Dynamic Amplifier  Post-amplification Residue Generation Scheme  Residue Amplification  Complex Residue-transferring Realization  Residue Amplifier  Power Consumption  Sar Adc  Calibration Complexity  Aggressive Interpolation Factor  Flash Adc  Mm-wave 5g Receivers  Adc-based Serial Links  Power 5.5 Mw  Calibration  Quantization (Signal)  Clocks  System-on-chip  Interpolation  Prototype