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A Two-Channel Time-Interleaved Continuous-Time Third-Order CIFF-Based Delta-Sigma Modulator Journal article
Yue Hu, Yuekai Liu, Xinyu Qin, Yan Liu, Mingqiang Guo, Sai-Weng Sin, Guoxing Wang, Yong Lian, Liang Qi. A Two-Channel Time-Interleaved Continuous-Time Third-Order CIFF-Based Delta-Sigma Modulator[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2023, 1-13.
Authors:  Yue Hu;  Yuekai Liu;  Xinyu Qin;  Yan Liu;  Mingqiang Guo; et al.
Adobe PDF | Favorite | TC[WOS]:2 TC[Scopus]:2  IF:5.2/4.5 | Submit date：2023/08/22
Continuous-time Delta-sigma Modulator (Dsm)  Time-interleaved (Ti)  Cascaded Integrator Of Distributed Feedforward (Ciff)  Excess Loop Delay (Eld) Compensation  
High-Performance Oversampling ADCs Book chapter
出自: Analog Circuits and Signal Processing, Switzerland:Springer, 2023, 页码:181-218
Authors:  Chi-Hang Chan;  Yan Zhu;  Liang Qi;  Sai Weng Sin;  Maurits Ortmanns; et al.
Favorite | TC[Scopus]:0 | Submit date：2023/08/03
Analog-to-digital Converter (Adc)  Cmos  Continuous-time Dsm (Ct Dsm)  Delta-sigma Modulator (Dsm)  Noise Shaping (Ns)  Oversampling  Pipeline Sar Adc  Successive Approximation Register (Sar)  
On the Synthesis of Continuous-Time Sturdy MASH Delta-Sigma Modulators Journal article
Jingying Zhang, Sai-Weng Sin, Yan Liu, Fan Ye, Guoxing Wang, Maurits Ortmanns, Liang Qi. On the Synthesis of Continuous-Time Sturdy MASH Delta-Sigma Modulators[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2022, 70(2), 356-360.
Authors:  Jingying Zhang;  Sai-Weng Sin;  Yan Liu;  Fan Ye;  Guoxing Wang; et al.
Favorite | TC[WOS]:1 TC[Scopus]:1  IF:4.0/3.7 | Submit date：2023/01/30
Delta-sigma Modulator (Dsm)  Continuous-time (Ct)  Sturdy Multi-stage Noise-shaping (Smash)  Excess Loop Delay (Eld)  Loop-filter Connection  
A 100-MHz BW 72.6-dB-SNDR CT ΔΣ Modulator Utilizing Preliminary Sampling and Quantization Journal article
Wang,Wei, Chan,Chi Hang, Zhu,Yan, Martins,Rui P.. A 100-MHz BW 72.6-dB-SNDR CT ΔΣ Modulator Utilizing Preliminary Sampling and Quantization[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2020, 55(6), 1588-1598.
Authors:  Wang,Wei;  Chan,Chi Hang;  Zhu,Yan;  Martins,Rui P.
Favorite | TC[WOS]:13 TC[Scopus]:15  IF:4.6/5.6 | Submit date：2020/12/04
Analog-to-digital Conversion (Adc)  Continuous-time Delta-sigma Modulator (Ct-dsm)  Preliminary Sampling And Quantization (Psq) Technique  Single Amplifier Biquad (Sab)  Successiveapproximation-register (Sar) Architecture-based Quantizer (Qtz)