Residential College | false |
Status | 已發表Published |
On the Synthesis of Continuous-Time Sturdy MASH Delta-Sigma Modulators | |
Jingying Zhang1; Sai-Weng Sin2; Yan Liu1; Fan Ye3; Guoxing Wang1; Maurits Ortmanns4; Liang Qi1 | |
2022-10-05 | |
Source Publication | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS |
ISSN | 1549-7747 |
Volume | 70Issue:2Pages:356-360 |
Abstract | Sturdy multi-stage noise-shaping (SMASH) delta-sigma modulators (DSMs) achieve high-order noise-shaping while significantly alleviating the mismatch issue between analog and digital transfer functions. Based on the SMASH architecture, we propose a methodology of synthesizing its continuous-time (CT) architecture from its discrete-time (DT) counterpart by using loop-filter connections. The proposed methodology circumvents the necessity of a direct extraction of the quantization noise from the early stages, which is problematic for CT architectures with high sampling rate. Moreover, the proposed method allows to intuitively compensate the CT SMASH for the excess loop delay (ELD). Furthermore, an input feedforward path is introduced into the second stage to eliminate the STF peaking induced by the ELD. A 2-2 SMASH topology is analyzed as a case study to demonstrate the synthesis methodology. Besides, we present derivations for determining loop-filter coefficients. Simulation results confirm the efficacy of the synthesis methodology for the SMASH topology. |
Keyword | Delta-sigma Modulator (Dsm) Continuous-time (Ct) Sturdy Multi-stage Noise-shaping (Smash) Excess Loop Delay (Eld) Loop-filter Connection |
DOI | 10.1109/TCSII.2022.3212059 |
URL | View the original |
Indexed By | SCIE |
Language | 英語English |
WOS Research Area | Engineering |
WOS Subject | Engineering, Electrical & Electronic |
WOS ID | WOS:000929815700001 |
Publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC445 HOES LANE, PISCATAWAY, NJ 08855-4141 |
Scopus ID | 2-s2.0-85139842828 |
Fulltext Access | |
Citation statistics | |
Document Type | Journal article |
Collection | DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING Faculty of Science and Technology THE STATE KEY LABORATORY OF ANALOG AND MIXED-SIGNAL VLSI (UNIVERSITY OF MACAU) INSTITUTE OF MICROELECTRONICS |
Corresponding Author | Liang Qi |
Affiliation | 1.Department of Micro-Nano Electronics, Bio-Circuits and Systems Laboratory, Shanghai Jiao Tong University, Shanghai, China 2.Institute of Microelectronics, Faculty of Science and Technology, Department of Electrical and Computer Engineering, State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macau, China 3.State Key Lab of ASIC and Systems, Fudan University, Shanghai, China 4.Institute of Microelectronics, Faculty of Engineering, Computer Science and Psychology, University of Ulm, Ulm, Germany |
Recommended Citation GB/T 7714 | Jingying Zhang,Sai-Weng Sin,Yan Liu,et al. On the Synthesis of Continuous-Time Sturdy MASH Delta-Sigma Modulators[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2022, 70(2), 356-360. |
APA | Jingying Zhang., Sai-Weng Sin., Yan Liu., Fan Ye., Guoxing Wang., Maurits Ortmanns., & Liang Qi (2022). On the Synthesis of Continuous-Time Sturdy MASH Delta-Sigma Modulators. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 70(2), 356-360. |
MLA | Jingying Zhang,et al."On the Synthesis of Continuous-Time Sturdy MASH Delta-Sigma Modulators".IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS 70.2(2022):356-360. |
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