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Seven-bit 700-MS/s Four-Way Time-Interleaved SAR ADC With Partial Vcm -Based Switching Journal article
Chan, C. H., Zhu, Y., Sin, S. W., Martins, R. P.. Seven-bit 700-MS/s Four-Way Time-Interleaved SAR ADC With Partial Vcm -Based Switching[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2017, 1168-1172.
Authors:  Chan, C. H.;  Zhu, Y.;  Sin, S. W.;  Martins, R. P.
Favorite |   IF:2.8/2.8 | Submit date：2022/01/24
Common mode variation  partial Vcm-based switching  time-interleaved successive approximation register analog-to-digital converter (TI SAR ADC)  
Seven-bit 700-MS/s Four-Way Time-Interleaved SAR ADC with Partial Vcm-Based Switching Journal article
Dezhi Xing, Yan Zhu, Chi-Hang Chan, Sai-Wng Sin, Fan Ye, Junyan Ren, Seng-Pan U, Rui Paulo Martins. Seven-bit 700-MS/s Four-Way Time-Interleaved SAR ADC with Partial Vcm-Based Switching[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2017, 25(3), 1168-1172.
Authors:  Dezhi Xing;  Yan Zhu;  Chi-Hang Chan;  Sai-Wng Sin;  Fan Ye; et al.
Favorite | TC[WOS]:14 TC[Scopus]:17 | Submit date：2019/02/11
Common Mode Variation  Partial Vcm-based Switching  Time-interleaved Successive ApproximaTion Register Analog-to-digital Converter (Ti Sar Adc)  
Seven-bit 700-MS/s Four-Way Time-Interleaved SAR ADC With Partial V-cm-Based Switching Journal article
Xing, Dezhi, Zhu, Yan, Chan, Chi-Hang, Sin, Sai-Weng, Ye, Fan, Ren, Junyan, U, Seng-Pan, Martins, Rui Paulo. Seven-bit 700-MS/s Four-Way Time-Interleaved SAR ADC With Partial V-cm-Based Switching[J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2017, 25(3), 1168-1172.
Authors:  Xing, Dezhi;  Zhu, Yan;  Chan, Chi-Hang;  Sin, Sai-Weng;  Ye, Fan; et al.
Favorite | TC[WOS]:14 TC[Scopus]:17  IF:2.8/2.8 | Submit date：2018/10/30
Common Mode Variation  Partial V-cm-based Switching  Time-interleaved Successive ApproximaTion Register Analog-to-digital Converter (Ti Sar Adc)