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A Subthreshold Operation Series-Parallel Charge Pump Incorporating Dynamic Source-Fed Oscillator for Wide-Input-Voltage Energy Harvesting Application
Journal article
Kee, Yong Jack, Ramiah, Harikrishnan, Churchill, Kishore Kumar Pakkirisami, Chong, Gabriel, Mekhilef, Saad, Lai, Nai Shyan, Chen, Yong, Mak, Pui In, Martins, Rui P.. A Subthreshold Operation Series-Parallel Charge Pump Incorporating Dynamic Source-Fed Oscillator for Wide-Input-Voltage Energy Harvesting Application[J]. IEEE Access, 2023, 11, 97641-97653.
Authors:
Kee, Yong Jack
;
Ramiah, Harikrishnan
;
Churchill, Kishore Kumar Pakkirisami
;
Chong, Gabriel
;
Mekhilef, Saad
; et al.
Favorite
|
TC[WOS]:
2
TC[Scopus]:
2
IF:
3.4
/
3.7
|
Submit date:2024/02/22
Cmos
Dc-to-dc Converter
Low Power Energy Harvesting
Power Conversion Efficiency (Pce)
Reconfigurable Charge Pump (Cp)
Ring-voltage Controlled Oscillator (Rvco)
A 2.0-to-7.4-GHz 16-Phase Delay-Locked Loop With a Sub-0.6-ps Phase-Delay Error in 40-nm CMOS
Journal article
Yang,Jian, Pan,Quan, Yin,Jun, Mak,Pui In. A 2.0-to-7.4-GHz 16-Phase Delay-Locked Loop With a Sub-0.6-ps Phase-Delay Error in 40-nm CMOS[J]. IEEE Transactions on Microwave Theory and Techniques, 2023, 71(8), 3596 - 3604.
Authors:
Yang,Jian
;
Pan,Quan
;
Yin,Jun
;
Mak,Pui In
Favorite
|
TC[WOS]:
4
TC[Scopus]:
4
IF:
4.1
/
4.2
|
Submit date:2023/08/03
Charge Pump (Cp)
Clock Generator
Delay-locked Loop (Dll)
Locking Range
Multiphase Clock
Phase Accuracy
A Sub-0.25-pJ/bit 47.6-to-58.8-Gb/s Reference-Less FD-Less Single-Loop PAM-4 Bang-Bang CDR with a Deliberate-Current-Mismatch Frequency Acquisition Technique in 28-nm CMOS
Journal article
Xiaoteng Zhao, Yong Chen, Lin Wang, Pui In Mak, Franco Maloberti, Rui P. Martins. A Sub-0.25-pJ/bit 47.6-to-58.8-Gb/s Reference-Less FD-Less Single-Loop PAM-4 Bang-Bang CDR with a Deliberate-Current-Mismatch Frequency Acquisition Technique in 28-nm CMOS[J]. IEEE Journal of Solid-State Circuits, 2022, 57(5), 1358-1371.
Authors:
Xiaoteng Zhao
;
Yong Chen
;
Lin Wang
;
Pui In Mak
;
Franco Maloberti
; et al.
Favorite
|
TC[WOS]:
10
TC[Scopus]:
14
IF:
4.6
/
5.6
|
Submit date:2022/05/13
And Zero Net Current (Znc)
Bang-bang Clock And Data Recovery (Bbcdr)
Charge Pump (Cp)
Cmos
Four-level Pulse-amplitude Modulation (Pam)
Frequency Detector (Fd)
Half-rate
Negative Net Current (Nnc)
Positive Net Current (Pnc)
Reference-less
A 10.8-to-37.4Gb/s Single-Loop Quarter-Rate BBCDR Without External Reference and Separate FD Featuring a Wide-Frequency-Acquisition Scheme
Conference paper
Wang, Lin, Chen, Yong, Yang, Chaowei, Zhao, Xiaoteng, Mak, Pui In, Maloberti, Franco, Martins, Rui P.. A 10.8-to-37.4Gb/s Single-Loop Quarter-Rate BBCDR Without External Reference and Separate FD Featuring a Wide-Frequency-Acquisition Scheme[C]:IEEE, 345 E 47TH ST, NEW YORK, NY 10017 USA, 2022.
Authors:
Wang, Lin
;
Chen, Yong
;
Yang, Chaowei
;
Zhao, Xiaoteng
;
Mak, Pui In
; et al.
Favorite
|
TC[WOS]:
1
TC[Scopus]:
1
|
Submit date:2023/03/06
Hybrid Control Circuit (Hcc)
Deliberate Current Mismatch
Charge Pump (Cp)
Ring Oscillator (Ro)
R-2r Dac
Positive (Pnc)
Negative (Nnc)
Zero (Znc) Net Current
A 0.0285-mm² 0.68-pJ/bit Single-Loop Full-Rate Bang-Bang CDR Without Reference and Separate FD Pulling Off an 8.2-Gb/s/μs Acquisition Speed of the PAM-4 Input in 28-nm CMOS
Journal article
Zhao, Xiaoteng, Chen, Yong, Mak, Pui In, Martins, Rui P.. A 0.0285-mm² 0.68-pJ/bit Single-Loop Full-Rate Bang-Bang CDR Without Reference and Separate FD Pulling Off an 8.2-Gb/s/μs Acquisition Speed of the PAM-4 Input in 28-nm CMOS[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2021, 57(2), 546-561.
Authors:
Zhao, Xiaoteng
;
Chen, Yong
;
Mak, Pui In
;
Martins, Rui P.
Favorite
|
TC[WOS]:
13
TC[Scopus]:
13
IF:
4.6
/
5.6
|
Submit date:2021/10/28
Acquisition Speed
Bang-bang Clock And Data Recovery (Bbcdr)
Charge Pump (Cp)
Clocks
Cmos
Detectors
Four-level Pulse Amplitude Modulation (Pam-4)
Frequency Detector (Fd)
Frequency Modulation
Hybrid Control Circuit (Hcc)
Jitter
Jitter Tolerance (Jtol)
Jitter Transfer Function (Jtf)
Logic Gates
Phase Detector (Pd)
Strobe Point (Sp).
Switches
Voltage-controlled Oscillators
A Sub-0.25pJ/bit 47.6-to-58.8Gb/s Reference-Less FD-Less Single-Loop PAM-4 Bang-Bang CDR with a Deliberately-Current-Mismatch Frequency Acquisition Technique in 28nm CMOS
Conference paper
Zhao, Xiaoteng, Chen, Yong, Wang, Lin, Mak, Pui In, Maloberti, Franco, Martins, Rui P.. A Sub-0.25pJ/bit 47.6-to-58.8Gb/s Reference-Less FD-Less Single-Loop PAM-4 Bang-Bang CDR with a Deliberately-Current-Mismatch Frequency Acquisition Technique in 28nm CMOS[C], 2021, 131-134.
Authors:
Zhao, Xiaoteng
;
Chen, Yong
;
Wang, Lin
;
Mak, Pui In
;
Maloberti, Franco
; et al.
Favorite
|
TC[WOS]:
6
TC[Scopus]:
9
|
Submit date:2021/09/20
4-level Pulse Amplitude Modulation (Pam-4)
Bang-bang Clock And Data Recovery (Bbcdr)
Charge Pump (Cp)
Cmos
Frequency Detector (Fd)
Half-rate
Negative (Nnc) Net Current
Positive (Pnc)
Reference Less
Single Loop
Zero (Znc)
A 0.0285mm2 0.68pJ/bit Single-Loop Full-Rate Bang-Bang CDR without Reference and Separate Frequency Detector Achieving an 8.2(Gb/s)/μs Acquisition Speed of PAM-4 data in 28nm CMOS
Conference paper
Zhao,Xiaoteng, Chen,Yong, Mak,Pui In, Martins,Rui P.. A 0.0285mm2 0.68pJ/bit Single-Loop Full-Rate Bang-Bang CDR without Reference and Separate Frequency Detector Achieving an 8.2(Gb/s)/μs Acquisition Speed of PAM-4 data in 28nm CMOS[C], 2020.
Authors:
Zhao,Xiaoteng
;
Chen,Yong
;
Mak,Pui In
;
Martins,Rui P.
Favorite
|
TC[Scopus]:
16
|
Submit date:2021/03/04
Acquisition Speed
Alexander Phase Detector (Pd)
Bang-bang
Bang-bang Clock And Data Recovery (Cdr)
Charge Pump (Cp)
Frequency Detector (Fd)
Full-rate
Jitter Tolerance (Jtf)
Jitter Transfer Function (Jtf)
Single Loop
Strobe Point (Sp)
A 0.18-V 382-mu W Bluetooth Low-Energy Receiver Front-End With 1.33-nW Sleep Power for Energy-Harvesting Applications in 28-nm CMOS
Journal article
Yi, Haidong, Yu, Wei-Han, Mak, Pui-In, Yin, Jun, Martins, Rui P.. A 0.18-V 382-mu W Bluetooth Low-Energy Receiver Front-End With 1.33-nW Sleep Power for Energy-Harvesting Applications in 28-nm CMOS[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2018, 53(6), 1618-1627.
Authors:
Yi, Haidong
;
Yu, Wei-Han
;
Mak, Pui-In
;
Yin, Jun
;
Martins, Rui P.
Favorite
|
TC[WOS]:
53
TC[Scopus]:
60
IF:
4.6
/
5.6
|
Submit date:2018/10/30
Bandgap Reference (Bgr)
Bluetooth Low Energy (Ble)
Charge Pump (Cp)
Class-d Voltage-controlled Oscillator (Vco)
Cmos
Energy Harvesting
Low-noise Amplifier (Lna)
Micropower Manager (Mu Pm)
Power-gating
Receiver (Rx)
Ultra-low Power (Ulp)
Ultra-low Voltage (Ulv)
A 0.18V 382µW Bluetooth Low-Energy (BLE) Receiver Front-End with 1.33nW Sleep Power for Energy-Harvesting Applications in 28nm CMOS
Journal article
Haidong Yi, Wei-Han Yu, Pui-In Mak, Jun Yin, Rui P. Martins. A 0.18V 382µW Bluetooth Low-Energy (BLE) Receiver Front-End with 1.33nW Sleep Power for Energy-Harvesting Applications in 28nm CMOS[J]. IEEE Journal of Solid-State Circuits, 2018, 53(6), 1618 - 1627.
Authors:
Haidong Yi
;
Wei-Han Yu
;
Pui-In Mak
;
Jun Yin
;
Rui P. Martins
Favorite
|
TC[WOS]:
53
TC[Scopus]:
60
IF:
4.6
/
5.6
|
Submit date:2019/03/12
Bandgap Reference (Bgr)
Bluetooth Low Energy (Ble)
Charge Pump (Cp)
Class-d Voltage-controlled Oscillator (Vco)
Cmos
Energy Harvesting
Low-noise Amplifier (Lna)
Micropower Manager (Μpm)
Power-gating
Receiver (Rx)
Ultra-low Power (Ulp)
Ultra-low Voltage (Ulv)
A 0.18-V 382-μ W Bluetooth Low-Energy Receiver Front-End with 1.33-nW Sleep Power for Energy-Harvesting Applications in 28-nm CMOS
Journal article
Haidong Yi, Wei-Han Yu, Pui-In Mak, Jun Yin, Rui P. Martins. A 0.18-V 382-μ W Bluetooth Low-Energy Receiver Front-End with 1.33-nW Sleep Power for Energy-Harvesting Applications in 28-nm CMOS[J]. IEEE Journal of Solid-State Circuits, 2018, 53(6), 1618-1627.
Authors:
Haidong Yi
;
Wei-Han Yu
;
Pui-In Mak
;
Jun Yin
;
Rui P. Martins
Favorite
|
TC[WOS]:
53
TC[Scopus]:
60
|
Submit date:2019/02/11
Bandgap Reference (Bgr)
Bluetooth Low Energy (Ble)
Charge Pump (Cp)
Class-d Voltage-controlled Oscillator (Vco)
Cmos
Energy Harvesting
Low-noise Amplifier (Lna)
Micropower Manager (Μpm)
Power-gating
Receiver (Rx)
Ultra-low Power (Ulp)
Ultra-low Voltage (Ulv)