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A Two-Channel Time-Interleaved Continuous-Time Third-Order CIFF-Based Delta-Sigma Modulator
Journal article
Yue Hu, Yuekai Liu, Xinyu Qin, Yan Liu, Mingqiang Guo, Sai-Weng Sin, Guoxing Wang, Yong Lian, Liang Qi. A Two-Channel Time-Interleaved Continuous-Time Third-Order CIFF-Based Delta-Sigma Modulator[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2023, 1-13.
Authors:
Yue Hu
;
Yuekai Liu
;
Xinyu Qin
;
Yan Liu
;
Mingqiang Guo
; et al.
Adobe PDF
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Favorite
|
TC[WOS]:
2
TC[Scopus]:
2
IF:
5.2
/
4.5
|
Submit date:2023/08/22
Continuous-time Delta-sigma Modulator (Dsm)
Time-interleaved (Ti)
Cascaded Integrator Of Distributed Feedforward (Ciff)
Excess Loop Delay (Eld) Compensation
High-Performance Oversampling ADCs
Book chapter
出自: Analog Circuits and Signal Processing, Switzerland:Springer, 2023, 页码:181-218
Authors:
Chi-Hang Chan
;
Yan Zhu
;
Liang Qi
;
Sai Weng Sin
;
Maurits Ortmanns
; et al.
Favorite
|
TC[Scopus]:
0
|
Submit date:2023/08/03
Analog-to-digital Converter (Adc)
Cmos
Continuous-time Dsm (Ct Dsm)
Delta-sigma Modulator (Dsm)
Noise Shaping (Ns)
Oversampling
Pipeline Sar Adc
Successive Approximation Register (Sar)
On the Synthesis of Continuous-Time Sturdy MASH Delta-Sigma Modulators
Journal article
Jingying Zhang, Sai-Weng Sin, Yan Liu, Fan Ye, Guoxing Wang, Maurits Ortmanns, Liang Qi. On the Synthesis of Continuous-Time Sturdy MASH Delta-Sigma Modulators[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2022, 70(2), 356-360.
Authors:
Jingying Zhang
;
Sai-Weng Sin
;
Yan Liu
;
Fan Ye
;
Guoxing Wang
; et al.
Favorite
|
TC[WOS]:
1
TC[Scopus]:
1
IF:
4.0
/
3.7
|
Submit date:2023/01/30
Delta-sigma Modulator (Dsm)
Continuous-time (Ct)
Sturdy Multi-stage Noise-shaping (Smash)
Excess Loop Delay (Eld)
Loop-filter Connection
Wideband Continuous-time MASH Delta-Sigma Modulators: A Tutorial Review
Journal article
Qi, Liang, Liu, Yuekai, Sin, Sai Weng, Xing, Xinpeng, Wang, Guoxing, Ortmanns, Maurits, Martins, Rui P.. Wideband Continuous-time MASH Delta-Sigma Modulators: A Tutorial Review[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2022, 69(6), 2623-2628.
Authors:
Qi, Liang
;
Liu, Yuekai
;
Sin, Sai Weng
;
Xing, Xinpeng
;
Wang, Guoxing
; et al.
Favorite
|
TC[WOS]:
12
TC[Scopus]:
12
IF:
4.0
/
3.7
|
Submit date:2022/05/17
Delta-sigma Modulator (Dsm)
Continuoustime (Ct)
Multi-stage Noise-shaping (Mash)
Sturdy Mash
Quantization Noise (Qn)
Qn Leakage
Qn Extraction
A Robust Hybrid CT/DT 0-2 MASH DSM with Passive Noise-Shaping SAR ADC
Conference paper
Li, Ke, Sin, Sai Weng, Qi, Liang, Zhao, Weibing, Wang, Guoxing, Martins, R. P.. A Robust Hybrid CT/DT 0-2 MASH DSM with Passive Noise-Shaping SAR ADC[C], 2022, 551-555.
Authors:
Li, Ke
;
Sin, Sai Weng
;
Qi, Liang
;
Zhao, Weibing
;
Wang, Guoxing
; et al.
Favorite
|
TC[WOS]:
3
TC[Scopus]:
3
|
Submit date:2023/01/30
Delta-sigma Modulator (Dsm)
Hybrid Adc
Multi-stage Noise-shaping (Mash)
Noise-shaping Successive Approximation Register (Ns-sar)
A Time-Interleaved 2nd-Order ΔΣ Modulator Achieving 5-MHz Bandwidth and 86.1-dB SNDR Using Digital Feed-Forward Extrapolation
Journal article
Jiang, Dongyang, Qi, Liang, Sin, Sai Weng, Maloberti, Franco, Martins, Rui P.. A Time-Interleaved 2nd-Order ΔΣ Modulator Achieving 5-MHz Bandwidth and 86.1-dB SNDR Using Digital Feed-Forward Extrapolation[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2021, 56(8), 2375-2387.
Authors:
Jiang, Dongyang
;
Qi, Liang
;
Sin, Sai Weng
;
Maloberti, Franco
;
Martins, Rui P.
Favorite
|
TC[WOS]:
13
TC[Scopus]:
14
IF:
4.6
/
5.6
|
Submit date:2021/09/20
Analog-to-digital Converter (Adc)
Data Weighting Average (Dwa)
Delta-sigma Modulator (Dsm)
Digital Bank Filters
Digital-to-analog Converter (Dac)
Discrete-time (Dt)
Dithering
Dynamic Element Matching (Dem)
Extrapolation
Noise-coupling
Time-domain Analysis
Time-interleaved (Ti)
Discrete-time mash delta-sigma modulator with second-order digital noise coupling for wideband high-resolution applications
Conference paper
Qin, Xinyu, Zhang, Jingying, Qi, Liang, Sin, Sai Weng, Martins, Rui P., Wang, Guoxing. Discrete-time mash delta-sigma modulator with second-order digital noise coupling for wideband high-resolution applications[C], 2021.
Authors:
Qin, Xinyu
;
Zhang, Jingying
;
Qi, Liang
;
Sin, Sai Weng
;
Martins, Rui P.
; et al.
Favorite
|
TC[WOS]:
2
TC[Scopus]:
9
|
Submit date:2021/09/20
Digital Noise Coupling
Multistage Noise Shaping (Mash)
Noise Leakage
Wideband High-resolution Applications
Δς Modulator (Dsm)
A 100-MHz BW 72.6-dB-SNDR CT ΔΣ Modulator Utilizing Preliminary Sampling and Quantization
Journal article
Wang,Wei, Chan,Chi Hang, Zhu,Yan, Martins,Rui P.. A 100-MHz BW 72.6-dB-SNDR CT ΔΣ Modulator Utilizing Preliminary Sampling and Quantization[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2020, 55(6), 1588-1598.
Authors:
Wang,Wei
;
Chan,Chi Hang
;
Zhu,Yan
;
Martins,Rui P.
Favorite
|
TC[WOS]:
13
TC[Scopus]:
15
IF:
4.6
/
5.6
|
Submit date:2020/12/04
Analog-to-digital Conversion (Adc)
Continuous-time Delta-sigma Modulator (Ct-dsm)
Preliminary Sampling And Quantization (Psq) Technique
Single Amplifier Biquad (Sab)
Successiveapproximation-register (Sar) Architecture-based Quantizer (Qtz)