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A 1.83 μw, 0.78 μvrms input referred noise neural recording front end Conference paper
Jiangchao Wu, Man-Kay Law, Pui-In Mak, Rui P. Martins. A 1.83 μw, 0.78 μvrms input referred noise neural recording front end[C], 2013, 405-408.
Authors:  Jiangchao Wu;  Man-Kay Law;  Pui-In Mak;  Rui P. Martins
Favorite | TC[WOS]:0 TC[Scopus]:0 | Submit date：2019/02/11
A continuous-time VCO-assisted VCO-based ΣΔ modulator with 76.6dB SNDR and 10MHz BW Conference paper
Yun Du, Tao He, Yang Jiang, Sai-Weng Sin, Seng-Pan U, R.P.Martins. A continuous-time VCO-assisted VCO-based ΣΔ modulator with 76.6dB SNDR and 10MHz BW[C], 2013, 373-376.
Authors:  Yun Du;  Tao He;  Yang Jiang;  Sai-Weng Sin;  Seng-Pan U; et al.
Favorite | TC[WOS]:0 TC[Scopus]:2 | Submit date：2019/02/11
A 0.6 V 8b 100MS/s SAR ADC with Minimized DAC capacitance and switching energy in 65nm CMOS Conference paper
Wu, W. N., Zhu, Y., Ding, L., Chan, C. H., Chio, U. F., Sin, S. W., U, S. P., Martins, R. P.. A 0.6 V 8b 100MS/s SAR ADC with Minimized DAC capacitance and switching energy in 65nm CMOS[C], 2013.
Authors:  Wu, W. N.;  Zhu, Y.;  Ding, L.;  Chan, C. H.;  Chio, U. F.; et al.
Favorite |  | Submit date：2022/01/25
Switching Scheme  SAR ADC  DAC Design  
A background gain-calibration technique for low voltage pipelined ADCs based on nonlinear interpolation Conference paper
Li Ding, Sai-Weng Sin, Seng-Pan U, R.P.Martins. A background gain-calibration technique for low voltage pipelined ADCs based on nonlinear interpolation[C]:IEEE, 345 E 47TH ST, NEW YORK, NY 10017 USA, 2013, 665-668.
Authors:  Li Ding;  Sai-Weng Sin;  Seng-Pan U;  R.P.Martins
Favorite | TC[WOS]:2 TC[Scopus]:2 | Submit date：2019/02/11
Digital Calibration  Lms Algorithm  Nonlinear Interpolation  Pipelined Adcs  
A 0.6V 8b 100MS/s SAR ADC with minimized DAC capacitance and switching energy in 65nm CMOS Conference paper
Wen-Lan Wu, Yan Zhu, Li Ding, Chi-Hang Chan, U-Fat Chio, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins. A 0.6V 8b 100MS/s SAR ADC with minimized DAC capacitance and switching energy in 65nm CMOS[C], 2013, 2239-2242.
Authors:  Wen-Lan Wu;  Yan Zhu;  Li Ding;  Chi-Hang Chan;  U-Fat Chio; et al.
Favorite | TC[WOS]:10 TC[Scopus]:10 | Submit date：2019/02/11
A 0.5V 10GHz 8-phase LC-VCO Combining current-reuse and back-gate-coupling techniques consuming 2mW Conference paper
Md.Tawfiq Amin, Pui-In Mak, Rui P. Martins. A 0.5V 10GHz 8-phase LC-VCO Combining current-reuse and back-gate-coupling techniques consuming 2mW[C]:IEEE, 345 E 47TH ST, NEW YORK, NY 10017 USA, 2013, 2698-2701.
Authors:  Md.Tawfiq Amin;  Pui-In Mak;  Rui P. Martins
Favorite | TC[WOS]:1 TC[Scopus]:4 | Submit date：2019/02/11