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A 32-Gb/s 3.53-mW/Gb/s Adaptive Receiver AFE Employing a Hybrid CTLE, Edge-DFE and Merged Data-DFE/CDR in 65-nm CMOS Conference paper
Arya Balachandran, Yong Chen, Chirn Chye Boon. A 32-Gb/s 3.53-mW/Gb/s Adaptive Receiver AFE Employing a Hybrid CTLE, Edge-DFE and Merged Data-DFE/CDR in 65-nm CMOS[C]:IEEE, 2019, 221-224.
Authors:  Arya Balachandran;  Yong Chen;  Chirn Chye Boon
Favorite | TC[Scopus]:17 | Submit date：2021/10/28
Cmos  Analog Front-end (Afe)  Low Frequency Equalization (Lfeq)  Inductorless  Continuous-time Linear Equalizer (Ctle)  Inductorless  Channel Loss  Decision Feedback Equalization (Dfe)  Receiver  
A 0.013-mm(2) 0.53-mW/Gb/s 32-Gb/s Hybrid Analog Equalizer Under 21-dB Channel Loss in 65-nm CMOS Journal article
Balachandran, Arya, Chen, Yong, Boon, Chirn Chye. A 0.013-mm(2) 0.53-mW/Gb/s 32-Gb/s Hybrid Analog Equalizer Under 21-dB Channel Loss in 65-nm CMOS[J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2018, 26(3), 599-603.
Authors:  Balachandran, Arya;  Chen, Yong;  Boon, Chirn Chye
Favorite | TC[WOS]:16 TC[Scopus]:18  IF:2.8/2.8 | Submit date：2018/10/30
Channel Loss  Cmos Equalizer  Continuous-time Linear Equalizer (Ctle)  Figure Of Merit (Fom)  Inductorless  Intersymbol Interference (Isi)  Low-frequency Equalization (Lfeq)  
A 0.013-mm2 0.53-mW/Gb/s 32-Gb/s Hybrid Analog Equalizer under 21-dB Channel Loss in 65-nm CMOS Journal article
Balachandran A., Chen Y., Boon C.C.. A 0.013-mm2 0.53-mW/Gb/s 32-Gb/s Hybrid Analog Equalizer under 21-dB Channel Loss in 65-nm CMOS[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2017, 26(3), 599-603.
Authors:  Balachandran A.;  Chen Y.;  Boon C.C.
Favorite | TC[WOS]:16 TC[Scopus]:18 | Submit date：2019/02/14
Channel Loss  Cmos Equalizer  Continuoustime Linear Equalizer (Ctle)  Figure Of Merit (Fom)  Inductorless  Intersymbol Interference (Isi)  Low-frequency Equalization (Lfeq)