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Conference paper [1]
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2016 [1]
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21st Asia and So... [1]
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Sub-threshold VLSI-Logic Family Exploiting Unbalanced Pull-up/down Network, Logical Effort and Inverse-Narrow-Width Techniques
Conference paper
Li, M., Ieong, C. I., Law, M. K., Mak, P. I., Vai, M. I., Pun, S. H., Martins, R. P.. Sub-threshold VLSI-Logic Family Exploiting Unbalanced Pull-up/down Network, Logical Effort and Inverse-Narrow-Width Techniques[C], 2016.
Authors:
Li, M.
;
Ieong, C. I.
;
Law, M. K.
;
Mak, P. I.
;
Vai, M. I.
; et al.
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Submit date：2022/01/24
Sub-threshold Logic
Unbalanced Pull-up/down Network
Logical Effort
Inverse-Narrow-Width Effect
