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A 23.2-to-26-GHz Low-Jitter Fast-Locking Sub-Sampling PLL Based on a Function-Reused VCO-Buffer and a Type-I FLL With Rapid Phase Alignment Journal article
Li, Haoran, Xu, Tailong, Meng, Xi, Yin, Jun, Martins, Rui P., Mak, Pui In. A 23.2-to-26-GHz Low-Jitter Fast-Locking Sub-Sampling PLL Based on a Function-Reused VCO-Buffer and a Type-I FLL With Rapid Phase Alignment[J]. IEEE Journal of Solid-State Circuits, 2024.
Authors:  Li, Haoran;  Xu, Tailong;  Meng, Xi;  Yin, Jun;  Martins, Rui P.; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:4.6/5.6 | Submit date：2024/10/10
Fast Locking  Frequency Synthesis  Frequency-locked Loop (Fll)  Low Jitter  Millimeter-wave (Mm-wave)  Phase-locked Loop (Pll)  Reference (Ref.) Spur  Sub-sampling Phase Detector (Sspd)  Voltage-controlled Oscillator (Vco)  
A 28 nm 368 fJ/cycle, 0.43%/V Supply Sensitivity, FLL based RC Oscillator Featuring Positive TC Only Resistors and ΣM Based Trimming Journal article
Huang,Yunbo, Chen,Yong, Yang,Kaiyuan, Crovetti,Paolo, Mak,Pui In, Martins,Rui P.. A 28 nm 368 fJ/cycle, 0.43%/V Supply Sensitivity, FLL based RC Oscillator Featuring Positive TC Only Resistors and ΣM Based Trimming[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2023, 70(11), 3950-3954.
Authors:  Huang,Yunbo;  Chen,Yong;  Yang,Kaiyuan;  Crovetti,Paolo;  Mak,Pui In; et al.
Favorite | TC[WOS]:2 TC[Scopus]:2  IF:4.0/3.7 | Submit date：2023/08/03
Clocks  Cmos  Delta-sigma-modulator  Energy Efficiency  Frequency Inaccuracy  Frequency-locked-loop (Fll)  Generators  Oscillators  Rc Oscillator  Resistance  Resistors  Switched-capacitor Resistor  Switches  Temperature Coefficients  Voltage-controlled Oscillators  
An FLL Providing Real-Time Frequency Calibration for OOK Power Oscillator Transmitters Journal article
Yadong Yin, Zehui Zhang, Weiming Xiao, Ximing Fu, Kamal El-Sankary, Sio-Hang Pun. An FLL Providing Real-Time Frequency Calibration for OOK Power Oscillator Transmitters[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2023, 70(9), 3233-3237.
Authors:  Yadong Yin;  Zehui Zhang;  Weiming Xiao;  Ximing Fu;  Kamal El-Sankary; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:4.0/3.7 | Submit date：2023/08/03
Frequency-locked Loop (Fll)  Ook Modulation  Power Oscillator Transmitter  Pulse-width Detection  Time Register  
Fully-Integrated Timers for Ultra-Low-Power Internet-of-Things Nodes - Fundamentals and Design Techniques Review article
2022
Authors:  Loo, Mikki How Wen;  Ramiah, Harikrishnan;  Lei, Ka Meng;  Lim, Chee Cheow;  Lai, Nai Shyan; et al.
Favorite | TC[WOS]:6 TC[Scopus]:8  IF:3.4/3.7 | Submit date：2022/09/09
Allan Deviation  Cmos  Figure-of-merit (Fom)  Frequency-locked-loop (Fll)  Internet-of-things (Iot)  Jitter  Phase Noise  Relaxation Oscillator (Rxo)  Ultra-low-power  Wakeup Timers  
A 3.3-GHz Integer N-Type-II Sub-Sampling PLL Using a BFSK-Suppressed Push-Pull SS-PD and a Fast-Locking FLL Achieving -82.2-dBc REF Spur and -255-dB FOM Journal article
Yang, Zunsong, Chen, Yong, Yuan, Jia, Mak, Pui In, Martins, Rui P.. A 3.3-GHz Integer N-Type-II Sub-Sampling PLL Using a BFSK-Suppressed Push-Pull SS-PD and a Fast-Locking FLL Achieving -82.2-dBc REF Spur and -255-dB FOM[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2021, 30(2), 238-242.
Authors:  Yang, Zunsong;  Chen, Yong;  Yuan, Jia;  Mak, Pui In;  Martins, Rui P.
Favorite | TC[WOS]:20 TC[Scopus]:21  IF:2.8/2.8 | Submit date：2022/03/04
Binary Frequency Shift Keying (Bfsk)  Frequency-locked Loop (Fll)  Integer-n  Phase Detector (Pd)  Phase Noise (Pn)  Phase-locked Loop (Pll)  Push-pull  Reference (Ref) Spur  Sub-sampling (Ss)  Voltage-controlled Oscillator (Vco)