UM

Browse/Search Results:  1-5 of 5 Help

Selected(0)Clear Items/Page:    Sort:
N-AquaRAM: A Cost-Efficient Deep Learning Accelerator for Real-Time Aquaponic Monitoring Journal article
Siddique, Ali, Iqbal, Muhammad Azhar, Sun, Jingqi, Zhang, Xu, Vai, Mang I., Siddique, Sunbal. N-AquaRAM: A Cost-Efficient Deep Learning Accelerator for Real-Time Aquaponic Monitoring[J]. Agricultural Research, 2024.
Authors:  Siddique, Ali;  Iqbal, Muhammad Azhar;  Sun, Jingqi;  Zhang, Xu;  Vai, Mang I.; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:1.4/1.5 | Submit date:2024/10/10
Aquaculture  Deep Learning Accelerator  Field Programmable Gate Arrays (Fpgas)  Fish Size Estimation  Giga OPerations Per Second (Gops)  Smart Aquaponics  
A 218 GOPS neural network accelerator based on a novel cost-efficient surrogate gradient scheme for pattern classification Journal article
Siddique, Ali, Iqbal, Muhammad Azhar, Aleem, Muhammad, Islam, Muhammad Arshad. A 218 GOPS neural network accelerator based on a novel cost-efficient surrogate gradient scheme for pattern classification[J]. Microprocessors and Microsystems, 2023, 99, 104831.
Authors:  Siddique, Ali;  Iqbal, Muhammad Azhar;  Aleem, Muhammad;  Islam, Muhammad Arshad
Favorite | TC[WOS]:2 TC[Scopus]:3  IF:1.9/2.0 | Submit date:2023/07/20
Activation Function  Artificial Neural Networks (Anns)  Deep Learning (Dl)  Dying Relu  Field Programmable Gate Arrays (Fpgas)  Giga OPerations Per Second (Gops)  Surrogate Gradient  
An FPGA-Based Transformer Accelerator Using Output Block Stationary Dataflow for Object Recognition Applications Journal article
Zhao, Zhongyu, Cao, Rujian, Un, Ka Fai, Yu, Wei Han, Mak, Pui In, Martins, Rui P.. An FPGA-Based Transformer Accelerator Using Output Block Stationary Dataflow for Object Recognition Applications[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2023, 70(1), 281-285.
Authors:  Zhao, Zhongyu;  Cao, Rujian;  Un, Ka Fai;  Yu, Wei Han;  Mak, Pui In; et al.
Favorite | TC[WOS]:8 TC[Scopus]:12  IF:4.0/3.7 | Submit date:2022/08/08
Transformers  Energy Efficiency  Broadcasting  Convolutional Neural Networks  Integrated Circuit Modeling  Field Programmable Gate Arrays  Random Access Memory  Dataflow  Digital Accelerator  Energy-efficient  Field-programmable Gate Array (Fpga)  Energy Efficiency  Image Recognition  Transformer  
An FPGA-Based Self-Reconfigurable Arc Fault Detection System for Smart Meters Journal article
Ya-Jie Wu, Wai-Hei Choi, Chi-Seng Lam, Man-Chung Wong, Sai-Weng Sin, Rui Paulo Martins. An FPGA-Based Self-Reconfigurable Arc Fault Detection System for Smart Meters[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2022, 69(10), 4133-4137.
Authors:  Ya-Jie Wu;  Wai-Hei Choi;  Chi-Seng Lam;  Man-Chung Wong;  Sai-Weng Sin; et al.
Favorite | TC[WOS]:1 TC[Scopus]:2  IF:4.0/3.7 | Submit date:2022/08/05
Arc Fault  Band-pass Filters  Electrical Fault Detection  Fault Detection  Field Programmable Analog Arrays  Field Programmable Gate Arrays  Loading  Mixed Signal Processing  Sensors  Smart Meters  
An FPGA-Based Energy-Efficient Reconfigurable Depthwise Separable Convolution Accelerator for Image Recognition Journal article
Lei Xuan, Ka-Fai Un, Chi-Seng Lam, Rui P. Martins. An FPGA-Based Energy-Efficient Reconfigurable Depthwise Separable Convolution Accelerator for Image Recognition[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2022, 69(10), 4003-4007.
Authors:  Lei Xuan;  Ka-Fai Un;  Chi-Seng Lam;  Rui P. Martins
Favorite | TC[WOS]:26 TC[Scopus]:26  IF:4.0/3.7 | Submit date:2022/06/14
Frequency Modulation  Field Programmable Gate Arrays  Energy Efficiency  Memory Management  Random Access Memory  Arrays  Computational Cost  Convolutional Neural Network (Cnn)  Field-programmable Gate Array (Fpga)  Mobilenetv2  Neural Network  Quantization