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A 5-bit 1.25-GS/s 4x-capacitive-folding flash ADC in 65-nm CMOS Journal article
Chi-Hang Chan, Yan Zhu, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins, Franco Maloberti. A 5-bit 1.25-GS/s 4x-capacitive-folding flash ADC in 65-nm CMOS[J]. IEEE Journal of Solid-State Circuits, 2013, 48(9), 2154-2169.
Authors:  Chi-Hang Chan;  Yan Zhu;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo Martins; et al.
Favorite | TC[WOS]:17 TC[Scopus]:19  IF:4.6/5.6 | Submit date：2018/10/30
Analog-to-digital Conversion (Adc)  Calibration  Embedded Reference  Flash Adc  Folding  Low Power