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A 3 THz CMOS Image Sensor Journal article
Liu, Min, Cai, Ziteng, Wang, Zhe, Zhou, Shaohua, Law, Man Kay, Liu, Jian, Ma, Jianguo, Wu, Nanjian, Liu, Liyuan. A 3 THz CMOS Image Sensor[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2024, 59(9), 2934-2947.
Authors:  Liu, Min;  Cai, Ziteng;  Wang, Zhe;  Zhou, Shaohua;  Law, Man Kay; et al.
Favorite | TC[WOS]:2 TC[Scopus]:2  IF:4.6/5.6 | Submit date：2024/05/16
Column-parallel Readout (Cpro) Architecture  Cpro Circuit Chain  Defected Ground Structure (Dgs)  Digital Decimation Filter (Ddf)  Step-covered Patch Antenna  Terahertz Cmos Image Sensor (Tera-cis)  Time-multiplexing  
Near-Optimal Decoding of Incremental Delta-Sigma ADC Output Journal article
Wang,Bo, Law,Man Kay, Belhaouari,Samir Brahim, Bermak,Amine. Near-Optimal Decoding of Incremental Delta-Sigma ADC Output[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2020, 67(11), 3670-3680.
Authors:  Wang,Bo;  Law,Man Kay;  Belhaouari,Samir Brahim;  Bermak,Amine
Favorite | TC[WOS]:8 TC[Scopus]:8  IF:5.2/4.5 | Submit date：2021/03/11
Decimation Filter  Delta-sigma Modulator  Idc  Incremental Adc  Noise Penalty Factor  Optimal Filter  Reconstruction Filter  Thermal Noise Averaging  
A 0.45-V 70-nW QRS detector using decimated quadratic spline wavelet transform and window-based extrema difference techniques Conference paper
Xiao,Ruping, Li,Mingzhong, Law,Man Kay, Mak,Pui In, Martins,Rui P.. A 0.45-V 70-nW QRS detector using decimated quadratic spline wavelet transform and window-based extrema difference techniques[C], 2019.
Authors:  Xiao,Ruping;  Li,Mingzhong;  Law,Man Kay;  Mak,Pui In;  Martins,Rui P.
Favorite | TC[WOS]:0 TC[Scopus]:0 | Submit date：2021/03/09
Decimation  Ecg  Extrema Difference Curve  Low-power  Qrs Detector  Quadratic Spline Wavelet Transform  Window-based  
A 0.45 V 147-375 nW ECG Compression Processor With Wavelet Shrinkage and Adaptive Temporal Decimation Architectures Journal article
Ieong, Chio-In, Li, Mingzhong, Law, Man-Kay, Mak, Pui-In, Vai, Mang I., Martins, Rui P.. A 0.45 V 147-375 nW ECG Compression Processor With Wavelet Shrinkage and Adaptive Temporal Decimation Architectures[J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2017, 25(4), 1307-1319.
Authors:  Ieong, Chio-In;  Li, Mingzhong;  Law, Man-Kay;  Mak, Pui-In;  Vai, Mang I.; et al.
Favorite | TC[WOS]:25 TC[Scopus]:30  IF:2.8/2.8 | Submit date：2018/10/30
Adaptive Temporal Decimation (Atd)  Data Compression Processor  Electrocardiogram (Ecg)  Near-threshold Digital Logics  Wavelet Shrinkage (Ws)  Wavelet Transform (Wt)  
A 0.45 V 147–375 nW ECG Compression Processor With Wavelet Shrinkage and Adaptive Temporal Decimation Architectures Journal article
Ieong, C. I., Li, M., Law, M. K., Mak, P. I., Vai, M. I., Martins, R. P.. A 0.45 V 147–375 nW ECG Compression Processor With Wavelet Shrinkage and Adaptive Temporal Decimation Architectures[J]. IEEE Transactions on Very Large Scale Integration Systems, 2017, 1307-1319.
Authors:  Ieong, C. I.;  Li, M.;  Law, M. K.;  Mak, P. I.;  Vai, M. I.; et al.
Favorite | TC[WOS]:25 TC[Scopus]:30  IF:2.8/2.8 | Submit date：2022/01/24
Adaptive Temporal Decimation (Atd)  Data Compression Processor  Electrocardiogram (Ecg)  Near-threshold Digital Logics  Wavelet Transform (Wt)  Wavelet Shrinkage (Ws)