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A 28-nm 18.7 TOPS/mm 2 89.4-to-234.6 TOPS/W 8b Single-Finger eDRAM Compute-in-Memory Macro With Bit-Wise Sparsity Aware and Kernel-Wise Weight Update/Refresh Journal article
Zhan, Yi, Yu, Wei Han, Un, Ka Fai, Martins, Rui P., Mak, Pui In. A 28-nm 18.7 TOPS/mm 2 89.4-to-234.6 TOPS/W 8b Single-Finger eDRAM Compute-in-Memory Macro With Bit-Wise Sparsity Aware and Kernel-Wise Weight Update/Refresh[J]. IEEE Journal of Solid-State Circuits, 2024, 59(11), 3866-3876.
Authors:  Zhan, Yi;  Yu, Wei Han;  Un, Ka Fai;  Martins, Rui P.;  Mak, Pui In
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:4.6/5.6 | Submit date：2024/05/16
Compute-in-memory (Cim)  Deep Neural Network (Dnn)  Embedded Dynamic Random Access Memory (Edram)  Input-sparsity  Single-finger (Sf)  Weight Update/refresh  
A Reconfigurable Floating-Point Compute-In-Memory With Analog Exponent Pre-Processes Journal article
He, Pengyu, Zhao, Yuanzhe, Xie, Heng, Wang, Yang, Yin, Shouyi, Li, Li, Zhu, Yan, Martins, Rui P., Chan, Chi Hang, Zhang, Minglei. A Reconfigurable Floating-Point Compute-In-Memory With Analog Exponent Pre-Processes[J]. IEEE Solid-State Circuits Letters, 2024, 7, 271-274.
Authors:  He, Pengyu;  Zhao, Yuanzhe;  Xie, Heng;  Wang, Yang;  Yin, Shouyi; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0 | Submit date：2024/10/10
Compute-in-memory Macro(Cim)  Exponent Pre-process  Floating-point(Fp)  Reconfigurable  Segmented Computation  
A 90.7-nW Vibration-Based Condition Monitoring Chip Featuring a Digital Compute-in-Memory-Based DNN Accelerator Using an Ultra-Low-Power 13T-SRAM Cell Journal article
Zhang, Haochen, Yu, Wei Han, Yang, Zhizhan, Un, Ka Fai, Yin, Jun, Martins, Rui P., Mak, Pui In. A 90.7-nW Vibration-Based Condition Monitoring Chip Featuring a Digital Compute-in-Memory-Based DNN Accelerator Using an Ultra-Low-Power 13T-SRAM Cell[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2024.
Authors:  Zhang, Haochen;  Yu, Wei Han;  Yang, Zhizhan;  Un, Ka Fai;  Yin, Jun; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:4.6/5.6 | Submit date：2024/08/05
13t-sram  Accelerometer Sensor  Compute-in-memory (Cim)  Deep Neural Network (Dnn)  Feature Extractor  Internet-of-things  Ultra-low Power (Ulp)  Vibration-based Condition Monitoring (Vbcm)  
FLEX-CIM: A Flexible Kernel Size 1-GHz 181.6-TOPS/W 25.63-TOPS/mm2 Analog Compute-in-Memory Macro Journal article
Fu, Yuzhao, Yu, Wei Han, Un, Ka Fai, Chan, Chi Hang, Zhu, Yan, Zhang, Minglei, Martins, Rui P., Mak, Pui In. FLEX-CIM: A Flexible Kernel Size 1-GHz 181.6-TOPS/W 25.63-TOPS/mm2 Analog Compute-in-Memory Macro[J]. IEEE Journal of Solid-State Circuits, 2024.
Authors:  Fu, Yuzhao;  Yu, Wei Han;  Un, Ka Fai;  Chan, Chi Hang;  Zhu, Yan; et al.
Favorite | TC[WOS]:1 TC[Scopus]:1  IF:4.6/5.6 | Submit date：2024/05/16
Analog Partial Sum (Aps)  Compute-in-memory (Cim)  Convolutional Neural Network (Cnn)  Flexible Kernel Size  Utilization  
CLUT-CIM: A Capacitance Lookup Table-Based Analog Compute-in-Memory Macro With Signed-Channel Training and Weight Updating for Nonuniform Quantization Journal article
Fu, Yuzhao, Li, Jixuan, Yu, Wei Han, Un, Ka Fai, Chan, Chi Hang, Zhu, Yan, Martins, Rui P., Mak, Pui In. CLUT-CIM: A Capacitance Lookup Table-Based Analog Compute-in-Memory Macro With Signed-Channel Training and Weight Updating for Nonuniform Quantization[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2024.
Authors:  Fu, Yuzhao;  Li, Jixuan;  Yu, Wei Han;  Un, Ka Fai;  Chan, Chi Hang; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:5.2/4.5 | Submit date：2024/07/04
Capacitance Lookup Table (Clut)  Circuits  Common Information Model (Computing)  Compute-in-memory (Cim)  Energy Efficiency  High Energy Efficiency  In-memory Computing  Indexes  Nonuniform Quantization (Nuq)  Table Lookup  Thermometers  Weight Updating