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Status | 已發表Published |
A 90.7-nW Vibration-Based Condition Monitoring Chip Featuring a Digital Compute-in-Memory-Based DNN Accelerator Using an Ultra-Low-Power 13T-SRAM Cell | |
Zhang, Haochen; Yu, Wei Han![]() ![]() ![]() ![]() ![]() ![]() | |
2024-06-24 | |
Source Publication | IEEE JOURNAL OF SOLID-STATE CIRCUITS
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ISSN | 0018-9200 |
Abstract | This article presents an energy-harvester-powered ultra-low power (ULP) vibration-based condition monitoring (VbCM) chip with a digital compute-in-memory (CIM)-based deep neural network (DNN) accelerator. The VbCM chip achieves end-to-end signal processing, including a piezoelectric (PZ)-based accelerometer sensor and its readout circuit (RoC), a digital CIM-based DNN accelerator and a ULP radio system. To perform the targeted rotating bearing anomaly detection task with best-in-class accelerator power consumption and energy efficiency, the chip integrates several technologies from the algorithm level to the hardware level, including: 1) Compressing deep neural network (C-DNN) to reduce the network size through a feature compressor module (FCM); 2) Signal chain characteristic adaptation from direct training of the time-domain feature extractor (TD-FEx); 3) ULP 13T SRAM CIM bitcell to perform high energy efficiency in-cell multiplication; and 4) ripple counter (RCNT)-based accumulation scheme to improve the overall energy efficiency of the accelerator under a 0.35 V supply voltage. The VbCM chip achieves 90.7 nW total power with an inference FR of 20 frames/s, and the DNN accelerator’s energy efficiency achieves 18.8 fJ/MAC. With all the weight parameters statically stored in the CIM macros, the accelerator can operate with an inference accuracy of 91.3% while consuming 24.7 nW. |
Keyword | 13t-sram Accelerometer Sensor Compute-in-memory (Cim) Deep Neural Network (Dnn) Feature Extractor Internet-of-things Ultra-low Power (Ulp) Vibration-based Condition Monitoring (Vbcm) |
DOI | 10.1109/JSSC.2024.3413891 |
URL | View the original |
Indexed By | SCIE |
Language | 英語English |
WOS Research Area | Engineering |
WOS Subject | Engineering, Electrical & Electronic |
WOS ID | WOS:001258785600001 |
Publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC, 445 HOES LANE, PISCATAWAY, NJ 08855-4141 |
Scopus ID | 2-s2.0-85197101085 |
Fulltext Access | |
Citation statistics | |
Document Type | Journal article |
Collection | Faculty of Science and Technology THE STATE KEY LABORATORY OF ANALOG AND MIXED-SIGNAL VLSI (UNIVERSITY OF MACAU) INSTITUTE OF MICROELECTRONICS DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING |
Corresponding Author | Mak, Pui In |
Affiliation | the Faculty of Science and Technology, and the Department of Electrical and Computer Engineering, State-Key Laboratory of Analog and Mixed-Signal VLSI, the Institute of Microelectronics, University of Macau, Macau, China |
First Author Affilication | Faculty of Science and Technology |
Corresponding Author Affilication | Faculty of Science and Technology |
Recommended Citation GB/T 7714 | Zhang, Haochen,Yu, Wei Han,Yang, Zhizhan,et al. A 90.7-nW Vibration-Based Condition Monitoring Chip Featuring a Digital Compute-in-Memory-Based DNN Accelerator Using an Ultra-Low-Power 13T-SRAM Cell[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2024. |
APA | Zhang, Haochen., Yu, Wei Han., Yang, Zhizhan., Un, Ka Fai., Yin, Jun., Martins, Rui P.., & Mak, Pui In (2024). A 90.7-nW Vibration-Based Condition Monitoring Chip Featuring a Digital Compute-in-Memory-Based DNN Accelerator Using an Ultra-Low-Power 13T-SRAM Cell. IEEE JOURNAL OF SOLID-STATE CIRCUITS. |
MLA | Zhang, Haochen,et al."A 90.7-nW Vibration-Based Condition Monitoring Chip Featuring a Digital Compute-in-Memory-Based DNN Accelerator Using an Ultra-Low-Power 13T-SRAM Cell".IEEE JOURNAL OF SOLID-STATE CIRCUITS (2024). |
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