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Design Trends and Perspectives of Digital Low Dropout Voltage Regulators for Low Voltage Mobile Applications: A Review Journal article
Lai, Li Fang, Ramiah, Harikrishnan, Tan, Yee Chyan, Lai, Nai Shyan, Lim, Chee Cheow, Chen, Yong, Mak, Pui In, Martins, Rui P.. Design Trends and Perspectives of Digital Low Dropout Voltage Regulators for Low Voltage Mobile Applications: A Review[J]. IEEE Access, 2023, 11, 85237-85258.
Authors:  Lai, Li Fang;  Ramiah, Harikrishnan;  Tan, Yee Chyan;  Lai, Nai Shyan;  Lim, Chee Cheow; et al.
Favorite | TC[WOS]:5 TC[Scopus]:6  IF:3.4/3.7 | Submit date：2024/02/23
Analog-assisted  Asynchronous  Cmos Process  Digital Low-dropout (Dldo) Regulators  Event-driven  Hybrid  Power Management Integrated Circuit (Pmic)  Self-clocked  Synchronous  System-on-chip (Soc)  
A 13 µW Analog Front-End with RRAM-Based Lowpass FIR Filter for EEG Signal Detection Journal article
Ren, Qirui, Chen, Chengying, Dong, Danian, Xu, Xiaoxin, Chen, Yong, Zhang, Feng. A 13 µW Analog Front-End with RRAM-Based Lowpass FIR Filter for EEG Signal Detection[J]. Sensors, 2022, 22(16), 6096.
Authors:  Ren, Qirui;  Chen, Chengying;  Dong, Danian;  Xu, Xiaoxin;  Chen, Yong; et al.
Favorite | TC[WOS]:4 TC[Scopus]:4  IF:3.4/3.7 | Submit date：2023/01/30
Analog Front-end (Afe)  Cmos  Eeg  Rram-based Lowpass Fir Filter  Signal Process  Ultra-low Power  
Process compensated bipolar junction transistor-based CMOS temperature sensor with a +/- 1.5 degrees C (3 sigma) batch-to-batch inaccuracy Journal article
Sun, Dapeng, Zhang, Tan-Tan, Law, Man-Kay, Mak, Pui-In, Martins, Rui Paulo. Process compensated bipolar junction transistor-based CMOS temperature sensor with a +/- 1.5 degrees C (3 sigma) batch-to-batch inaccuracy[J]. ELECTRONICS LETTERS, 2018, 54(22), 1270-1271.
Authors:  Sun, Dapeng;  Zhang, Tan-Tan;  Law, Man-Kay;  Mak, Pui-In;  Martins, Rui Paulo
Favorite | TC[WOS]:1 TC[Scopus]:1  IF:0.7/0.9 | Submit date：2019/01/17
Resistors  Calibration  Cmos Integrated Circuits  Bipolar Transistors  Temperature Sensors  First-batch-only Calibration Parameters  Batch-to-batch Inaccuracy  Piecewise Bjt Process  Compensation Property  Base Recombination Current  Base-emitter Voltage  Cmos Temperature Sensor  Process Compensated Bjt  Intra-die Variation  Spread Compensation Property  On-chip Resistors  Inter-die Variation  Current 3  0 Mua  Voltage 1  2 v  Temperature-40 Degc To 125 Degc  Size 0  036 Mm  
Energy Optimized Sub-threshold VLSI Logic Family with Unbalanced Pull-up/down Network and Inverse-Narrow-Width Techniques Journal article
Li, M., Ieong, C. I., Law, M. K., Mak, P. I., Vai, M. I., Pun, S. H., Martins, R. P.. Energy Optimized Sub-threshold VLSI Logic Family with Unbalanced Pull-up/down Network and Inverse-Narrow-Width Techniques[J]. IEEE Transactions on Very large scale integration systems, 2015, 3119-3123.
Authors:  Li, M.;  Ieong, C. I.;  Law, M. K.;  Mak, P. I.;  Vai, M. I.; et al.
Favorite |   IF:2.8/2.8 | Submit date：2022/01/24
CMOS  Electrocardiography (ECG)  device sizing  finite impulse response (FIR) filter  inverse-narrow-width (INW)  logical effort  process-voltage-temperature (PVT) variations  sub-threshold standard logic library  ultra-low-energy  ultra-low-voltage  
Energy Optimized Subthreshold VLSI Logic Family with Unbalanced Pull-Up/Down Network and Inverse Narrow-Width Techniques Journal article
Ming-Zhong Li, Chio-In Ieong, Man-Kay Law, Pui-In Mak, Mang-I Vai, Sio-Hang Pun, Rui P. Martins. Energy Optimized Subthreshold VLSI Logic Family with Unbalanced Pull-Up/Down Network and Inverse Narrow-Width Techniques[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2015, 23(12), 3119-3123.
Authors:  Ming-Zhong Li;  Chio-In Ieong;  Man-Kay Law;  Pui-In Mak;  Mang-I Vai; et al.
Favorite | TC[WOS]:18 TC[Scopus]:23 | Submit date：2019/02/11
Cmos  Device Sizing  Electrocardiography (Ecg)  Finite Impulse Response (Fir) Filter  Inverse Narrow Width (Inw)  Logical Effort  Process-voltage-temperature (Pvt) Variations  Subthreshold Standard Logic Library  Ultralow Energy  Ultralow Voltage.  
BJT Process Spread Compensation Utilizing Base Recombination Current in Standard CMOS Journal article
Wang B., Law M.K., Bermak A., Tang F.. BJT Process Spread Compensation Utilizing Base Recombination Current in Standard CMOS[J]. IEEE Electron Device Letters, 2015, 36(11), 1111-1113.
Authors:  Wang B.;  Law M.K.;  Bermak A.;  Tang F.
Favorite | TC[WOS]:3 TC[Scopus]:4 | Submit date：2019/02/14
Bipolar Junction Transistor (Bjt) Process Spread  Spread Compensation  Trimless Cmos Voltage Reference  
A precision CMOS voltage reference exploiting silicon bandgap narrowing effect Journal article
Wang B., Law M.K., Bermak A.. A precision CMOS voltage reference exploiting silicon bandgap narrowing effect[J]. IEEE Transactions on Electron Devices, 2015, 62(7), 2128-2135.
Authors:  Wang B.;  Law M.K.;  Bermak A.
Favorite | TC[WOS]:22 TC[Scopus]:27 | Submit date：2019/02/14
Bandgap Narrowing (Bgn)  Bipolar Junction Transistor (Bjt) Curvature Reduction  Bjt Noise  Cmos Bandgap Voltage Reference (Bgr)  Curvature Correction  Process Spread  Temperature Coefficient (Tc)  
A passive RFID tag embedded temperature sensor with improved process spreads immunity for a-30̂C to 60̂C sensing range Journal article
Wang B., Law M.-K., Bermak A., Luong H.C.. A passive RFID tag embedded temperature sensor with improved process spreads immunity for a-30̂C to 60̂C sensing range[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2014, 61(2), 337.
Authors:  Wang B.;  Law M.-K.;  Bermak A.;  Luong H.C.
Favorite | TC[WOS]:55 TC[Scopus]:63 | Submit date：2018/10/30
Cmos Temperature Sensors  Passive Rfid Tags  Process Compensation  Time-domain Conversion (Tdc)