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Nested-Current-Mirror Rail-to-Rail-Output Single-Stage Amplifier with Enhancements of DC Gain, GBW and Slew Rate Journal article
Zushu Yan, Pui-In Mak, Man-Kay Law, Rui P. Martins, Franco Maloberti. Nested-Current-Mirror Rail-to-Rail-Output Single-Stage Amplifier with Enhancements of DC Gain, GBW and Slew Rate[J]. IEEE Journal of Solid-State Circuits, 2015, 50(10), 2353-2366.
Authors:  Zushu Yan;  Pui-In Mak;  Man-Kay Law;  Rui P. Martins;  Franco Maloberti
Favorite | TC[WOS]:61 TC[Scopus]:67 | Submit date:2019/02/11
Area Efficiency  Cmos  Current Mirror  Dc Gain  Differential-pair (Dp) Amplifier  Frequency Compensation  Gain-bandwidth Product (Gbw)  Low Temperature Polysilicon Lcd  Multi-stage Amplifier  Nested Current Mirror  Rail-to-rail Output Swing  Single-stage Amplifier  Slew Rate (Sr)  Stability  
0.0045 mm2 15.8 μW three-stage amplifier driving 10×-wide (0.15-1.5 nF) capacitive loads with >50° phase margin Journal article
Zushu Yan, Pui-In Mak, Man-Kay Law, Rui Paulo Martins. 0.0045 mm2 15.8 μW three-stage amplifier driving 10×-wide (0.15-1.5 nF) capacitive loads with >50° phase margin[J]. Electronics Letters, 2015, 51(6), 454-456.
Authors:  Zushu Yan;  Pui-In Mak;  Man-Kay Law;  Rui Paulo Martins
Favorite | TC[WOS]:5 TC[Scopus]:5 | Submit date:2019/02/12
A 0.0045-mm2 32.4-μW Two-Stage Amplifier for pF-to-nF Load Using CM Frequency Compensation Journal article
Zushu Yan, Wei Wang, Pui-In Mak, Man-Kay Law, Rui P. Martins. A 0.0045-mm2 32.4-μW Two-Stage Amplifier for pF-to-nF Load Using CM Frequency Compensation[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2015, 62(3), 246-250.
Authors:  Zushu Yan;  Wei Wang;  Pui-In Mak;  Man-Kay Law;  Rui P. Martins
Favorite | TC[WOS]:20 TC[Scopus]:22  IF:4.0/3.7 | Submit date:2019/02/11
Capacitive Load  Capacitor Multiplier  Cmos  Frequency Compensation  Stability  Two-stage Amplifier  
Frequency compensation techniques for low-power and small-area multistage amplifiers Patent
专利类型: 发明专利 Invention, 专利号: US8963639B2, 申请日期: 2013-02-19, 公开日期: 2015-02-24
Authors:  Yan, Zushu;  Mak, Pui-In;  Law, Man-Kay;  Rui Paulo da Silva MARTINS
Adobe PDF | Favorite |  | Submit date:2019/03/05
A 0.0013mm2 3.6µW nested-current-mirror single-stage amplifier driving 0.15-to-15nF capacitive loads with >62° phase margin Conference paper
Zushu Yan, Pui-In Mak, Man-Kay Law, Rui Martins, Franco Maloberti. A 0.0013mm2 3.6µW nested-current-mirror single-stage amplifier driving 0.15-to-15nF capacitive loads with >62° phase margin[C], 2014, 288-289.
Authors:  Zushu Yan;  Pui-In Mak;  Man-Kay Law;  Rui Martins;  Franco Maloberti
Favorite | TC[WOS]:2 TC[Scopus]:14 | Submit date:2019/02/11
Micropower two-stage amplifier employing recycling current-buffer Miller compensation Conference paper
Wei Wang, Zushu Yan, Pui-In Mak, Man-Kay Law, Rui P. Martins. Micropower two-stage amplifier employing recycling current-buffer Miller compensation[C], 2014, 1889-1892.
Authors:  Wei Wang;  Zushu Yan;  Pui-In Mak;  Man-Kay Law;  Rui P. Martins
Favorite | TC[WOS]:5 TC[Scopus]:6 | Submit date:2019/02/11
A 0.016-mm2 144-μ W three-stage amplifier capable of driving 1-to-15 nF capacitive load with > 0.95-MHz GBW Journal article
Yan,Zushu, Mak,Pui In, Law,Man Kay, Martins,Rui P.. A 0.016-mm2 144-μ W three-stage amplifier capable of driving 1-to-15 nF capacitive load with > 0.95-MHz GBW[J]. IEEE Journal of Solid-State Circuits, 2013, 48(2), 527-540.
Authors:  Yan,Zushu;  Mak,Pui In;  Law,Man Kay;  Martins,Rui P.
Favorite | TC[WOS]:122 TC[Scopus]:128  IF:4.6/5.6 | Submit date:2021/03/09
Active Lhp Zero  Cmos  Current Buffer  Current Buffer Miller Compensation  Frequency Compensation  Miller Compensation  Pole-zero Cancellation  Three-stage Amplifier  
Erratum: A 0.016 mm2 144-μW three-stage amplifier capable of driving 1-to-15 nF capacitive load with >0.95-MHz GBW (IEEE Journal of Solid-State Circuits) Journal article
Yan, Zushu, Mak, Pui In, Law, Man Kay, Martins, R. P.. Erratum: A 0.016 mm2 144-μW three-stage amplifier capable of driving 1-to-15 nF capacitive load with >0.95-MHz GBW (IEEE Journal of Solid-State Circuits)[J]. IEEE Journal of Solid-State Circuits, 2013, 48(6), 1539-1539.
Authors:  Yan, Zushu;  Mak, Pui In;  Law, Man Kay;  Martins, R. P.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:4.6/5.6 | Submit date:2022/09/30
Circuit Analysis  Feedback Loop  Limiting  Poles And Zeros  Stability Analysis  Standards  
Double recycling technique for folded-cascode OTA Journal article
Zushu Yan, Pui-In Mak, R. P. Martins. Double recycling technique for folded-cascode OTA[J]. Analog Integrated Circuits and Signal Processing, 2012, 71(1), 137-141.
Authors:  Zushu Yan;  Pui-In Mak;  R. P. Martins
Favorite | TC[WOS]:47 TC[Scopus]:63  IF:1.2/1.0 | Submit date:2018/10/30
Operational Transconductance Amplifier (Ota)  Current Recycling  Folded-cascode  Cmos  
A 0.016mm2144μW three-stage amplifier capable of driving 1-to-15nF capacitive load with >0.95MHz GBW Conference paper
Yan, Zushu, Mak, Pui-In, Law, Man-Kay, Martins, Rui. A 0.016mm2144μW three-stage amplifier capable of driving 1-to-15nF capacitive load with >0.95MHz GBW[C]. Institute of Electrical and Electronics Engineers Inc., 2012, 368-369.
Authors:  Yan, Zushu;  Mak, Pui-In;  Law, Man-Kay;  Martins, Rui
Favorite | TC[WOS]:122 TC[Scopus]:15 | Submit date:2018/11/06