Erratum: A 0.016 mm2 144-μW three-stage amplifier capable of driving 1-to-15 nF capacitive load with >0.95-MHz GBW (IEEE Journal of Solid-State Circuits)

doi:10.1109/JSSC.2013.2254553

UM > Faculty of Science and Technology > DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING

Residential College	false
Status	已發表Published
	Erratum: A 0.016 mm2 144-μW three-stage amplifier capable of driving 1-to-15 nF capacitive load with >0.95-MHz GBW (IEEE Journal of Solid-State Circuits)
	Yan, Zushu 1; Mak, Pui In1 ; Law, Man Kay 1; Martins, R. P.1,2
	2013
Source Publication	IEEE Journal of Solid-State Circuits
ISSN	0018-9200
Volume	48 Issue:6 Pages:1539-1539
Abstract	In the above-named article [ibid., vol. 48, no. 2, pp. 527-540, Feb. 2013], US Patent 7,646,247 (Jan. 12, 2010) was cited in the description of Fig. 8, for a more general description about the utilization and advantages of the G _ma stage. However, the article by U. Dasgupta "Issues in "Ahuja" frequency compensation technique," (Proc. IEEE Int. Symp. Radio-Frequency Integration Technology, 2009, pp. 326-329) exhibits the circuit implementation of the G _ma stage (improved Ahuja compensation circuit), which, for that reason, should have been referenced for completeness, as well. The authors would like to thank Dr. U. Dasgupta for pointing out this missing information.
Keyword	Circuit Analysis Feedback Loop Limiting Poles And Zeros Stability Analysis Standards
DOI	10.1109/JSSC.2013.2254553
URL	View the original
Indexed By	SCIE
Language	英語English
WOS Research Area	Engineering
WOS Subject	Engineering, Electrical & Electronic
WOS ID	WOS:000320937700019
Publisher	IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC445 HOES LANE, PISCATAWAY, NJ 08855-4141
Scopus ID	2-s2.0-84878340996
Fulltext Access	View Full-Text via DOI View Full-Text via Web of Science View Full-Text via Scopus
Citation statistics
Document Type	Journal article
Collection	DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING Faculty of Science and Technology THE STATE KEY LABORATORY OF ANALOG AND MIXED-SIGNAL VLSI (UNIVERSITY OF MACAU) INSTITUTE OF MICROELECTRONICS
Corresponding Author	Yan, Zushu
Affiliation	1.State Key Laboratory of Analog and Mixed-Signal VLSI and FST-ECE, University of Macau, Macao, Macao 2.Instituto Superior Tcnico, TU of Lisbon, Lisbon, Portugal
First Author Affilication	Faculty of Science and Technology
Corresponding Author Affilication	Faculty of Science and Technology
Recommended Citation GB/T 7714	Yan, Zushu,Mak, Pui In,Law, Man Kay,et al. Erratum: A 0.016 mm2 144-μW three-stage amplifier capable of driving 1-to-15 nF capacitive load with >0.95-MHz GBW (IEEE Journal of Solid-State Circuits)[J]. IEEE Journal of Solid-State Circuits, 2013, 48(6), 1539-1539.
APA	Yan, Zushu., Mak, Pui In., Law, Man Kay., & Martins, R. P. (2013). Erratum: A 0.016 mm2 144-μW three-stage amplifier capable of driving 1-to-15 nF capacitive load with >0.95-MHz GBW (IEEE Journal of Solid-State Circuits). IEEE Journal of Solid-State Circuits, 48(6), 1539-1539.
MLA	Yan, Zushu,et al."Erratum: A 0.016 mm2 144-μW three-stage amplifier capable of driving 1-to-15 nF capacitive load with >0.95-MHz GBW (IEEE Journal of Solid-State Circuits)".IEEE Journal of Solid-State Circuits 48.6(2013):1539-1539.

Files in This Item:
There are no files associated with this item.

If you have any objections to this item, please fill out the form below and the administrator will contact you as soon as possible.
Content:
Email：	*
Affiliation No.
Verification Code:	Refresh

Any comments and suggestions are welcomed.
Title:	*
Content:
Email：	*
Verification Code:	Refresh