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2021 [2]
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IET Circuits Dev... [1]
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Theoretical total harmonic distortion evaluation based on digital to analogue converter mismatch to improve the linearity of successive approximation register analogue to digital converter
Journal article
Dong, Li, Song, Yan, Zhang, Bing, Lan, Zhechong, Xin, Youze, Liu, Liheng, Li, Ken, Wang, Xiaofei, Geng, Li. Theoretical total harmonic distortion evaluation based on digital to analogue converter mismatch to improve the linearity of successive approximation register analogue to digital converter[J]. IET Circuits Devices & Systems, 2021, 16(2), 189-199.
Authors:
Dong, Li
;
Song, Yan
;
Zhang, Bing
;
Lan, Zhechong
;
Xin, Youze
; et al.
Favorite
|
TC[WOS]:
1
TC[Scopus]:
2
IF:
1.0
/
1.0
|
Submit date:2022/03/28
Analog-to-digital Converter
Dynamic Element Matching
Successive Approximation Register
Time-based Integral Error
Total Harmonic Distribution
A 10-bit 20-MS/s SAR DAC achieving 57.9-dB SNDR using insensitive geometry DAC array
Journal article
Dong, Li, Song, Yan, Xie, Yi, Xin, Youze, Li, Ken, Jing, Xixin, Zhang, Bing, Gui, Xiaoyan, Geng, Li. A 10-bit 20-MS/s SAR DAC achieving 57.9-dB SNDR using insensitive geometry DAC array[J]. Microelectronics Journal, 2021, 113, 105109.
Authors:
Dong, Li
;
Song, Yan
;
Xie, Yi
;
Xin, Youze
;
Li, Ken
; et al.
Favorite
|
TC[WOS]:
0
TC[Scopus]:
0
IF:
1.9
/
1.7
|
Submit date:2021/12/08
Analog-to-digital Converter (Adc)
Area-efficient
Dac Mismatch
High Linearity
Insensitive Geometry