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Interactive IIR SC multirate compiler applied to multistage decimator design Journal article
PHILLIP N. CHEONG, R. P. MARTINS. Interactive IIR SC multirate compiler applied to multistage decimator design[J]. Journal of Circuits, Systems and Computers, 2007, 16(4), 517-525.
Authors:  PHILLIP N. CHEONG;  R. P. MARTINS
Favorite | TC[WOS]:2 TC[Scopus]:2  IF:0.9/0.9 | Submit date:2019/02/11
Iir Filter  Multistage  Switched Capacitors  Decimator Design  Compiler