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An Auxiliary-Channel-Sharing Background Distortion and Gain CalibrationAchieving >8dB SFDR Improvement over 4th Nyquist Zone in 1GS/s ADC Conference paper
Wei, L., Zheng, Z., Markulic, N., Lagos, J., Martens, E., Zhu, Y., Chan, C. H., Craninckx, J., Martins, R. P.. An Auxiliary-Channel-Sharing Background Distortion and Gain CalibrationAchieving >8dB SFDR Improvement over 4th Nyquist Zone in 1GS/s ADC[C], 2021.
Authors:  Wei, L.;  Zheng, Z.;  Markulic, N.;  Lagos, J.;  Martens, E.; et al.
Favorite |  | Submit date：2022/01/25
Background Calibration  Nonlinearity  Pipelined Adc  Split-sar Adc  
16.3 A Single-Channel 5.5mW 3.3GS/s 6b Fully Dynamic Pipelined ADC with Post-Amplification Residue Generation Conference paper
Zheng, Z., Wei, W., Lagos, J., Martens, E., Zhu, Y., Chan, C. H., Craninckx, J., Martins, R. P.. 16.3 A Single-Channel 5.5mW 3.3GS/s 6b Fully Dynamic Pipelined ADC with Post-Amplification Residue Generation[C], 2020.
Authors:  Zheng, Z.;  Wei, W.;  Lagos, J.;  Martens, E.;  Zhu, Y.; et al.
Favorite |  | Submit date：2022/01/25
Amplifiers  Analogue-digital Conversion  Calibration  Interpolation  Dynamic Pipelined Adc  Dynamic Pipelined Architecture  Linearized Dynamic Amplifier  Post-amplification Residue Generation Scheme  Residue Amplification  Complex Residue-transferring Realization  Residue Amplifier  Power Consumption  Sar Adc  Calibration Complexity  Aggressive Interpolation Factor  Flash Adc  Mm-wave 5g Receivers  Adc-based Serial Links  Power 5.5 Mw  Calibration  Quantization (Signal)  Clocks  System-on-chip  Interpolation  Prototype