×
验证码:
换一张
Forgotten Password?
Stay signed in
Login With UMPASS
English
|
繁體
Login With UMPASS
Log In
ALL
ORCID
TI
AU
PY
SU
KW
TY
JN
DA
IN
PB
FP
ST
SM
Study Hall
Home
Faculties & Institutes
Scholars
Publications
Subjects
Statistics
News
Search in the results
Faculties & Institutes
INSTITUTE OF M... [136]
Faculty of Sci... [123]
THE STATE KEY L... [28]
Faculty of Healt... [5]
THE STATE KEY LA... [3]
Institute of Chi... [2]
More...
Authors
CHAN CHI HANG [122]
ZHU YAN [108]
RUI PAULO DA S... [104]
SIN SAI WENG [43]
U SENG PAN [40]
ZHANG MINGLEI [26]
More...
Document Type
Conference pape... [72]
Journal article [70]
Patent [6]
Project [3]
Book chapter [2]
Other [1]
More...
Date Issued
2024 [18]
2023 [23]
2022 [14]
2021 [9]
2020 [13]
2019 [12]
More...
Language
英語English [137]
Source Publication
IEEE Journal of... [22]
Digest of Techn... [17]
IEEE Transaction... [8]
IEEE TRANSACTION... [6]
Proceedings of t... [6]
IEEE JOURNAL OF ... [5]
More...
Indexed By
SCIE [75]
CPCI-S [28]
ESCI [4]
BKCI-S [1]
CPCI [1]
Funding Organization
FDCT [2]
UM [1]
Funding Project
×
Knowledge Map
UM
Start a Submission
Submissions
Unclaimed
Claimed
Attach Fulltext
Bookmarks
Browse/Search Results:
1-10 of 154
Help
Selected(
0
)
Clear
Items/Page:
5
10
15
20
25
30
35
40
45
50
55
60
65
70
75
80
85
90
95
100
Sort:
Select
Journal Impact Factor Ascending
Journal Impact Factor Descending
Issue Date Ascending
Issue Date Descending
Submit date Ascending
Submit date Descending
WOS Cited Times Ascending
WOS Cited Times Descending
Title Ascending
Title Descending
Author Ascending
Author Descending
An Intrinsically PVT Robust 10-bit 2.6-GS/s Dynamic Pipelined ADC with Dual-Path Time-Assisted Residue Generation Scheme
Journal article
Hao, Junyan, Zhang, Minglei, Liu, Zijian, Zhang, Yanbo, Liu, Shubin, Zhu, Zhangming, Zhu, Yan, Martins, Rui P., Chan, Chi Hang. An Intrinsically PVT Robust 10-bit 2.6-GS/s Dynamic Pipelined ADC with Dual-Path Time-Assisted Residue Generation Scheme[J]. IEEE Journal of Solid-State Circuits, 2024.
Authors:
Hao, Junyan
;
Zhang, Minglei
;
Liu, Zijian
;
Zhang, Yanbo
;
Liu, Shubin
; et al.
Favorite
|
TC[WOS]:
0
TC[Scopus]:
0
IF:
4.6
/
5.6
|
Submit date:2024/12/26
Analog-to-digital Converter (Adc)
Parallel Quantization And Amplification
Pipelined Adc
Time-domain (Td) Adc
Voltage-to-time Converter (Vtc)
A 12-GS/s 12-b 4 × Time-Interleaved ADC Using Input-Independent Timing Skew Calibration With Global Dither Injection and Linearized Input Buffer
Journal article
Cao, Yuefeng, Zhang, Minglei, Zhu, Yan, Martins, Rui P., Chan, Chi Hang. A 12-GS/s 12-b 4 × Time-Interleaved ADC Using Input-Independent Timing Skew Calibration With Global Dither Injection and Linearized Input Buffer[J]. IEEE Journal of Solid-State Circuits, 2024, 59(12), 4211-4224.
Authors:
Cao, Yuefeng
;
Zhang, Minglei
;
Zhu, Yan
;
Martins, Rui P.
;
Chan, Chi Hang
Favorite
|
TC[WOS]:
1
TC[Scopus]:
1
IF:
4.6
/
5.6
|
Submit date:2024/12/05
Analog-to-digital Converter (Adc)
Global Dither Injection (Gdi)
Input Buffer (Ibf)
Self-adaptive Current Compensation (Sacc)
Sturdy Ring Amplifier (sRingamp)
Time-interleaved (Ti) Adc
Timing Skew Calibration
A 256 × 192-Pixel Direct Time-of-Flight LiDAR Receiver With a Current-Integrating-Based AFE Supporting 240-m-Range Imaging
Journal article
Chaorui Zou, Yaozhong Ou, Yan Zhu, Rui P. Martins, Chi-Hang Chan, Minglei Zhang. A 256 × 192-Pixel Direct Time-of-Flight LiDAR Receiver With a Current-Integrating-Based AFE Supporting 240-m-Range Imaging[J]. IEEE Journal of Solid-State Circuits ( Early Access ), 2024.
Authors:
Chaorui Zou
;
Yaozhong Ou
;
Yan Zhu
;
Rui P. Martins
;
Chi-Hang Chan
; et al.
Favorite
|
|
Submit date:2024/09/17
A 256 x 192-Pixel Direct Time-of-Flight LiDAR Receiver With a Current-Integrating-Based AFE Supporting 240-m-Range Imaging
Journal article
Zou, Chaorui, Ou, Yaozhong, Zhu, Yan, Rui P. Martins, Chi-Hang Chan, Minglei, Zhang. A 256 x 192-Pixel Direct Time-of-Flight LiDAR Receiver With a Current-Integrating-Based AFE Supporting 240-m-Range Imaging[J]. IEEE Journal of Solid-State Circuits, 2024, 59(11), 3525-3537.
Authors:
Zou, Chaorui
;
Ou, Yaozhong
;
Zhu, Yan
;
Rui P. Martins
;
Chi-Hang Chan
; et al.
Favorite
|
TC[WOS]:
0
TC[Scopus]:
0
IF:
4.6
/
5.6
|
Submit date:2024/08/30
3-d Imaging
Analog Frontend (Afe)
Background Light Compensation
Current-integrating (Ci)
Direct Timeof-flight (Dtof)
Lidar
Pixel Accumulation
Transimpedance Amplifier (Tia)
CLUT-CIM: A Capacitance Lookup Table-Based Analog Compute-in-Memory Macro With Signed-Channel Training and Weight Updating for Nonuniform Quantization
Journal article
Fu, Yuzhao, Li, Jixuan, Yu, Wei Han, Un, Ka Fai, Chan, Chi Hang, Zhu, Yan, Martins, Rui P., Mak, Pui In. CLUT-CIM: A Capacitance Lookup Table-Based Analog Compute-in-Memory Macro With Signed-Channel Training and Weight Updating for Nonuniform Quantization[J]. IEEE Transactions on Circuits and Systems I-Regular Papers, 2024, 71(11), 4996-5004.
Authors:
Fu, Yuzhao
;
Li, Jixuan
;
Yu, Wei Han
;
Un, Ka Fai
;
Chan, Chi Hang
; et al.
Favorite
|
TC[WOS]:
0
TC[Scopus]:
0
IF:
5.2
/
4.5
|
Submit date:2024/07/04
Capacitance Lookup Table (Clut)
Circuits
Common Information Model (Computing)
Compute-in-memory (Cim)
Energy Efficiency
High Energy Efficiency
In-memory Computing
Indexes
Nonuniform Quantization (Nuq)
Table Lookup
Thermometers
Weight Updating
A Reconfigurable Floating-Point Compute-In-Memory With Analog Exponent Pre-Processes
Journal article
He, Pengyu, Zhao, Yuanzhe, Xie, Heng, Wang, Yang, Yin, Shouyi, Li, Li, Zhu, Yan, Martins, Rui P., Chan, Chi Hang, Zhang, Minglei. A Reconfigurable Floating-Point Compute-In-Memory With Analog Exponent Pre-Processes[J]. IEEE Solid-State Circuits Letters, 2024, 7, 271-274.
Authors:
He, Pengyu
;
Zhao, Yuanzhe
;
Xie, Heng
;
Wang, Yang
;
Yin, Shouyi
; et al.
Favorite
|
TC[WOS]:
0
TC[Scopus]:
0
|
Submit date:2024/10/10
Compute-in-memory Macro(Cim)
Exponent Pre-process
Floating-point(Fp)
Reconfigurable
Segmented Computation
A Single-Channel 12-b 2-GS/s PVT-Robust Pipelined ADC With Sturdy Ring Amplifier and Time-Domain Quantizer
Journal article
Cao, Yuefeng, Zhang, Minglei, Zhu, Yan, Martins, Rui P., Chan, Chi Hang. A Single-Channel 12-b 2-GS/s PVT-Robust Pipelined ADC With Sturdy Ring Amplifier and Time-Domain Quantizer[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2024.
Authors:
Cao, Yuefeng
;
Zhang, Minglei
;
Zhu, Yan
;
Martins, Rui P.
;
Chan, Chi Hang
Favorite
|
TC[WOS]:
2
TC[Scopus]:
1
IF:
4.6
/
5.6
|
Submit date:2024/07/04
Analog-to-digital Converter (Adc)
Process, Supply Voltage, And Temperature (Pvt)-robust
Sturdy Ring Amplifier (sRingamp)
Time-domain Quantizer
Time-to-digital Converter (Tdc)
Voltage-to-time Converter (Vtc)
A PVT-Robust 8b 20GS/s Time-Interleaved SAR ADC with Quantization-Embedded Current-Mode Buffer and Differ-Based Dither Timing Skew Calibration
Conference paper
Zhang, Wei, Zhang, Minglei, Zhu, Yan, Martins, R. P., Chan, Chi Hang. A PVT-Robust 8b 20GS/s Time-Interleaved SAR ADC with Quantization-Embedded Current-Mode Buffer and Differ-Based Dither Timing Skew Calibration[C]:Institute of Electrical and Electronics Engineers Inc., 2024, 28-3.
Authors:
Zhang, Wei
;
Zhang, Minglei
;
Zhu, Yan
;
Martins, R. P.
;
Chan, Chi Hang
Favorite
|
TC[WOS]:
2
TC[Scopus]:
2
|
Submit date:2024/06/05
Application Specific Integrated Circuits
Quantization (Signal)
Prototypes
Linearity
Receivers
Bandwidth
Calibration
The Race for the Extra Pico Second without Losing the Decibel: A Partial-Review of Single-Channel Energy-Efficient High-Speed Nyquist ADCs
Conference paper
Chan, Chi Hana, Zhang, Minglei, Cao, Yuefena, Zhao, Honazhi, Martins, Rui P., Zhu, Yan. The Race for the Extra Pico Second without Losing the Decibel: A Partial-Review of Single-Channel Energy-Efficient High-Speed Nyquist ADCs[C]:Institute of Electrical and Electronics Engineers Inc., 2024, 28-1.
Authors:
Chan, Chi Hana
;
Zhang, Minglei
;
Cao, Yuefena
;
Zhao, Honazhi
;
Martins, Rui P.
; et al.
Favorite
|
TC[WOS]:
0
TC[Scopus]:
0
|
Submit date:2024/06/05
Technological Innovation
Quantization (Signal)
Power Demand
Energy Resolution
Reliability Engineering
Energy Efficiency
Trajectory
Time-domain Analysis
Task Analysis
Signal Resolution
A 28nm 314.6TLFOPS/W Reconfigurable Floating-Point Analog Compute-In-Memory Macro with Exponent Approximation and Two-Stage Sharing TD-ADC
Conference paper
He, Pengyu, Zhao, Yuanzhe, Xie, Heng, Wang, Yang, Yin, Shouyi, Li, Li, Zhu, Yan, Martins, R. P., Chan, Chi Hang, Zhang, Minglei. A 28nm 314.6TLFOPS/W Reconfigurable Floating-Point Analog Compute-In-Memory Macro with Exponent Approximation and Two-Stage Sharing TD-ADC[C]:Institute of Electrical and Electronics Engineers Inc., 2024.
Authors:
He, Pengyu
;
Zhao, Yuanzhe
;
Xie, Heng
;
Wang, Yang
;
Yin, Shouyi
; et al.
Favorite
|
TC[WOS]:
0
TC[Scopus]:
2
|
Submit date:2024/06/05
Power Demand
In-memory Computing
Throughput
Energy Efficiency
Hardware
Common Information Model (Computing)
Artificial Intelligence