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Analysis and Design of a 21.2-to-25.5-GHz Triple-Coil Transformer-Coupled QVCO Journal article
Zhao, Ya, Fan, Chao, Yin, Jun, Mak, Pui In, Geng, Li. Analysis and Design of a 21.2-to-25.5-GHz Triple-Coil Transformer-Coupled QVCO[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2024, 71(10), 4538-4549.
Authors:  Zhao, Ya;  Fan, Chao;  Yin, Jun;  Mak, Pui In;  Geng, Li
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:5.2/4.5 | Submit date:2024/11/05
Quadrature Voltage-controlled Oscillator (Qvco)  Phase Noise  Quadrature Phase Accuracy  Triple-coil  Transformer-coupled  Determinate Correlation  Bimodal Ambiguity  Tradeoff  Active Coupling Transistor  Alleviate  
An 840-to-970 MHz Multimodal Wake-Up Receiver With a Q-Equalized Antenna-ED Interface and 2-Dimensional Wake-Up Identification Journal article
Yang, Zhizhan, Zhang, Haochen, Yin, Jun, Martins, Rui P., Mak, Pui In. An 840-to-970 MHz Multimodal Wake-Up Receiver With a Q-Equalized Antenna-ED Interface and 2-Dimensional Wake-Up Identification[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2024.
Authors:  Yang, Zhizhan;  Zhang, Haochen;  Yin, Jun;  Martins, Rui P.;  Mak, Pui In
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:5.2/4.5 | Submit date:2024/10/10
Envelope Detector  Frequency-hopping  Internet Of Things (Iot)  Loop Antenna  Q-enhanced  Radio-frequency Identification (Rfid)  Ultra-low Power  Wake-up Receiver  
Two-Dimensional Cyclic Chaotic System for Noise-Reduced OFDM-DCSK Communication Journal article
Hua, Zhongyun, Wu, Zihua, Zhang, Yinxing, Bao, Han, Zhou, Yicong. Two-Dimensional Cyclic Chaotic System for Noise-Reduced OFDM-DCSK Communication[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2024.
Authors:  Hua, Zhongyun;  Wu, Zihua;  Zhang, Yinxing;  Bao, Han;  Zhou, Yicong
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Chaotic System  Chaos-based Practicality  Secure Communication  Chaotic Communication  
Accurate Modeling of Transformer-Based Voltage-Multiplier Considering Reverse Recovery Process of the Leakage Inductance in Step-up Converter Journal article
Yang, Ningrui, Li, Zou, Zeng, Jun, Liu, Junfeng, Hu, Renjun, Ying, Gengning, Yan, Zhixing, Wong, Man Chung, Zhang, Fangren. Accurate Modeling of Transformer-Based Voltage-Multiplier Considering Reverse Recovery Process of the Leakage Inductance in Step-up Converter[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2024, 71(8), 3891-3903.
Authors:  Yang, Ningrui;  Li, Zou;  Zeng, Jun;  Liu, Junfeng;  Hu, Renjun; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:5.2/4.5 | Submit date:2024/08/05
Step-up Converter  Transformer  Voltage Multiplier  Leakage Inductance  Modeling  
A Single-Inductor Multiple-Output DC–DC Converter With Fixed-Frequency Victim-Last Charge Control for Reduced Cross Regulation Journal article
Li, Yang, Huang, Mo, Martins, Rui P., Lu, Yan. A Single-Inductor Multiple-Output DC–DC Converter With Fixed-Frequency Victim-Last Charge Control for Reduced Cross Regulation[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2024, 71(8), 3904-3914.
Authors:  Li, Yang;  Huang, Mo;  Martins, Rui P.;  Lu, Yan
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:5.2/4.5 | Submit date:2024/06/05
Simo Dc–dc Converter  Victim-last Control  Charge Control  Cross-regulation  Charge-error Calibration  
0.4-V Supply, 12-nW Reverse Bandgap Voltage Reference with Single BJT and Indirect Curvature Compensation Journal article
Chon-Fai Lee, Chi-Wa U, Rui P. Martins, Chi-Seng Lam. 0.4-V Supply, 12-nW Reverse Bandgap Voltage Reference with Single BJT and Indirect Curvature Compensation[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2024.
Authors:  Chon-Fai Lee;  Chi-Wa U;  Rui P. Martins;  Chi-Seng Lam
Favorite |   IF:5.2/4.5 | Submit date:2024/08/26
A Fully-Integrated Flexible Dual-Ring Switched-Capacitor DC–DC Converter With Fractional VCRs and Parasitic Reduction Journal article
Jiang, Yifan, Lu, Yan, Jiang, Junmin. A Fully-Integrated Flexible Dual-Ring Switched-Capacitor DC–DC Converter With Fractional VCRs and Parasitic Reduction[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2024.
Authors:  Jiang, Yifan;  Lu, Yan;  Jiang, Junmin
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:5.2/4.5 | Submit date:2024/08/05
Converter Ring  Dc–dc Converter  Dual-ring  Fractional Vcrs  G-v2 Metric  Fully-integrated Voltage Regulator (Fivr)  Parasitic Reduction  Switched Capacitor (Sc) Converter  
A 28-nm Computing-in-Memory-Based Super-Resolution Accelerator Incorporating Macro-Level Pipeline and Texture/Algebraic Sparsity Journal article
Wu, Hao, Chen, Yong, Yuan, Yiyang, Yue, Jinshan, Fu, Xiangqu, Ren, Qirui, Luo, Qing, Mak, Pui In, Wang, Xinghua, Zhang, Feng. A 28-nm Computing-in-Memory-Based Super-Resolution Accelerator Incorporating Macro-Level Pipeline and Texture/Algebraic Sparsity[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2024, 71(2), 689-702.
Authors:  Wu, Hao;  Chen, Yong;  Yuan, Yiyang;  Yue, Jinshan;  Fu, Xiangqu; et al.
Favorite | TC[WOS]:1 TC[Scopus]:0  IF:5.2/4.5 | Submit date:2024/02/22
Algebraic Sparsity (As)  Cmos  Computing-in-memory (Cim)  Multiply-accumulation (Mac)  Structured Sparsity (Ss)  Super-resolution (Sr)  Texture Sparsity (Ts)  
A 5.6-dB Noise Figure, 63-86-GHz Receiver Using a Wideband Noise-Cancelling Low Noise Amplifier With Phase and Amplitude Compensation Journal article
Han, Changxuan, Deng, Zhixian, Shu, Yiyang, Yin, Jun, Mak, Pui In, Luo, Xun. A 5.6-dB Noise Figure, 63-86-GHz Receiver Using a Wideband Noise-Cancelling Low Noise Amplifier With Phase and Amplitude Compensation[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2024, 71(1), 120-132.
Authors:  Han, Changxuan;  Deng, Zhixian;  Shu, Yiyang;  Yin, Jun;  Mak, Pui In; et al.
Favorite | TC[WOS]:1 TC[Scopus]:1  IF:5.2/4.5 | Submit date:2024/02/22
Low Noise Amplifier (Lna)  Millimeter-wave (Mm-wave)  Noise-cancelling  Phase And Amplitude Compensation  Receiver (Rx)  Wideband  
CLUT-CIM: A Capacitance Lookup Table-Based Analog Compute-in-Memory Macro With Signed-Channel Training and Weight Updating for Nonuniform Quantization Journal article
Fu, Yuzhao, Li, Jixuan, Yu, Wei Han, Un, Ka Fai, Chan, Chi Hang, Zhu, Yan, Martins, Rui P., Mak, Pui In. CLUT-CIM: A Capacitance Lookup Table-Based Analog Compute-in-Memory Macro With Signed-Channel Training and Weight Updating for Nonuniform Quantization[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2024.
Authors:  Fu, Yuzhao;  Li, Jixuan;  Yu, Wei Han;  Un, Ka Fai;  Chan, Chi Hang; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:5.2/4.5 | Submit date:2024/07/04
Capacitance Lookup Table (Clut)  Circuits  Common Information Model (Computing)  Compute-in-memory (Cim)  Energy Efficiency  High Energy Efficiency  In-memory Computing  Indexes  Nonuniform Quantization (Nuq)  Table Lookup  Thermometers  Weight Updating