Fine-grained supply voltage management is highly favorable for high system power efficiency of a system-on-a-chip (SoC) or multicore microprocessors. Fully integrated low-dropout regulators (LDOs) can provide a compact and cost-effective solution to supply the multiple divided and adaptive voltage domains. Meanwhile, they enable a fast dynamic voltage and frequency scaling (DVFS) for digital systems. A conventional analog LDO (A-LDO) may not fit well in such high-current applications, due to its relatively low-frequency pole at the gate of the power transistor, and the performance degradation in a low-input voltage case. Instead, digital LDO (D-LDO), switching LDO (S-LDO), and hybrid architectures are more suitable for the digital loads. This chapter first discusses the classic LDO control methods and power stage selection considerations. Then, we detail the design techniques of the analog-assisted digital LDO, hybrid controlled LDO, and the ampere-level switching LDO, in an advanced nanoscale CMOS (complementary metal-oxide semiconductor) process.