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A 21.8-41.6-GHz Low Jitter and High FoMj Fast-Locking Subsampling PLL With Dead Zone Automatic Controller Journal article
Chen, Wen, Shu, Yiyang, Yin, Jun, Mak, Pui In, Gao, Xiang, Luo, Xun. A 21.8-41.6-GHz Low Jitter and High FoMj Fast-Locking Subsampling PLL With Dead Zone Automatic Controller[J]. IEEE Transactions on Microwave Theory and Techniques, 2024.
Authors:  Chen, Wen;  Shu, Yiyang;  Yin, Jun;  Mak, Pui In;  Gao, Xiang; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:4.1/4.2 | Submit date：2024/05/16
Detectors  Fast Locking  Frequency Locked Loops  Jitter  Jitter  Millimeter Wave (mm-Wave)  Phase Locked Loops  Phase Noise  Subsampling Phase-locked Loop (Sspll)  Voltage-controlled Oscillators  Wideband  Wideband  
A 12.9-to-24 GHz Dual-Mode Multi-Coil VCO Achieving 199.2 dBc/Hz Peak FoMT in 65-nm CMOS Journal article
Zhao, Ya, Fan, Chao, Peng, Yuanxing, Liang, Chenglong, Yin, Jun, Mak, Pui In, Geng, Li. A 12.9-to-24 GHz Dual-Mode Multi-Coil VCO Achieving 199.2 dBc/Hz Peak FoMT in 65-nm CMOS[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2024, 71(5), 2604-2608.
Authors:  Zhao, Ya;  Fan, Chao;  Peng, Yuanxing;  Liang, Chenglong;  Yin, Jun; et al.
Favorite | TC[WOS]:2 TC[Scopus]:2  IF:4.0/3.7 | Submit date：2024/05/16
Couplings  Dual-core  Dual-mode  Frequency Tuning Range (Ftr)  Inductance  Layout  Millimeter-wave (Mm-wave)  Mode-switching  Multi-coil  Phase Noise (Pn)  Transformer Cores  Transformers  Tuning  Voltage-controlled Oscillator (Vco)  Voltage-controlled Oscillators  
A 28 nm 368 fJ/cycle, 0.43%/V Supply Sensitivity, FLL based RC Oscillator Featuring Positive TC Only Resistors and ΣM Based Trimming Journal article
Huang,Yunbo, Chen,Yong, Yang,Kaiyuan, Crovetti,Paolo, Mak,Pui In, Martins,Rui P.. A 28 nm 368 fJ/cycle, 0.43%/V Supply Sensitivity, FLL based RC Oscillator Featuring Positive TC Only Resistors and ΣM Based Trimming[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2023, 70(11), 3950-3954.
Authors:  Huang,Yunbo;  Chen,Yong;  Yang,Kaiyuan;  Crovetti,Paolo;  Mak,Pui In; et al.
Favorite | TC[WOS]:2 TC[Scopus]:2  IF:4.0/3.7 | Submit date：2023/08/03
Clocks  Cmos  Delta-sigma-modulator  Energy Efficiency  Frequency Inaccuracy  Frequency-locked-loop (Fll)  Generators  Oscillators  Rc Oscillator  Resistance  Resistors  Switched-capacitor Resistor  Switches  Temperature Coefficients  Voltage-controlled Oscillators  
A Swing-Enhanced Class-D VCO Using a Periodically Time-Varying (PTV) Inductor Journal article
Lin, Xiaoqi, Yin, Jun, Mak, Pui In, Martins, Rui P.. A Swing-Enhanced Class-D VCO Using a Periodically Time-Varying (PTV) Inductor[J]. IEEE Solid-State Circuits Letters, 2022, 5, 25-28.
Authors:  Lin, Xiaoqi;  Yin, Jun;  Mak, Pui In;  Martins, Rui P.
Favorite | TC[WOS]:5 TC[Scopus]:5 | Submit date：2022/05/17
Inductors  Voltage-controlled Oscillators  Voltage  Capacitors  Resonant Frequency  Transistors  Transformers  
Accurate Performance Evaluation of Jitter-Power FOM for Multiplying Delay-Locked Loop Journal article
Liu, Yueduo, Bao, Rongxin, Zhu, Zihao, Yang, Shiheng, Zhou, Xiong, Li, Qiang, Yin, Jun, Mak, Pui In. Accurate Performance Evaluation of Jitter-Power FOM for Multiplying Delay-Locked Loop[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2022, 69(2), 495-505.
Authors:  Liu, Yueduo;  Bao, Rongxin;  Zhu, Zihao;  Yang, Shiheng;  Zhou, Xiong; et al.
Favorite | TC[WOS]:1 TC[Scopus]:1  IF:5.2/4.5 | Submit date：2022/03/04
Voltage-controlled Oscillators  Jitter  Clocks  Phase Noise (Pn)  Topology  Performance Evaluation  Delays  Figure Of Merit (Fom)  Injection-locked Clock Multiplier (Ilcm)  Multiplying Delay-locked Loop (Mdll)  Power  Ring Voltage-controlled Oscillator (Rvco)  
A 0.0285-mm² 0.68-pJ/bit Single-Loop Full-Rate Bang-Bang CDR Without Reference and Separate FD Pulling Off an 8.2-Gb/s/μs Acquisition Speed of the PAM-4 Input in 28-nm CMOS Journal article
Zhao, Xiaoteng, Chen, Yong, Mak, Pui In, Martins, Rui P.. A 0.0285-mm² 0.68-pJ/bit Single-Loop Full-Rate Bang-Bang CDR Without Reference and Separate FD Pulling Off an 8.2-Gb/s/μs Acquisition Speed of the PAM-4 Input in 28-nm CMOS[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2021, 57(2), 546-561.
Authors:  Zhao, Xiaoteng;  Chen, Yong;  Mak, Pui In;  Martins, Rui P.
Favorite | TC[WOS]:13 TC[Scopus]:13  IF:4.6/5.6 | Submit date：2021/10/28
Acquisition Speed  Bang-bang Clock And Data Recovery (Bbcdr)  Charge Pump (Cp)  Clocks  Cmos  Detectors  Four-level Pulse Amplitude Modulation (Pam-4)  Frequency Detector (Fd)  Frequency Modulation  Hybrid Control Circuit (Hcc)  Jitter  Jitter Tolerance (Jtol)  Jitter Transfer Function (Jtf)  Logic Gates  Phase Detector (Pd)  Strobe Point (Sp).  Switches  Voltage-controlled Oscillators  
Multiplying DLLs Book chapter
出自: Phase-Locked Frequency Generation and Clocking: Architectures and circuits for modern wireless and wireline systems, INST ENGINEERING TECH-IET, MICHAEL FARADAY HOUSE, STEVENAGE, HERTS SG1 2AY, ENGLAND:Institution of Engineering and Technology, 2020, 页码:645-664
Authors:  Yang, Shiheng;  Yin, Jun;  Mak, Pui In;  Martins, Rui P.
Favorite | TC[WOS]:0 TC[Scopus]:0 | Submit date：2021/12/03
Clocks  Delay Lock Loops  Jitter  Low-power Electronics  Multiplying Circuits  System-on-chip  Voltage-controlled Oscillators  
A Comparative Study of 8-Phase Feedforward-Coupling Ring VCOs Journal article
Iat-Fai Sun, Jun Yin, Pui-In Mak, Rui P. Martins. A Comparative Study of 8-Phase Feedforward-Coupling Ring VCOs[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2018.
Authors:  Iat-Fai Sun;  Jun Yin;  Pui-In Mak;  Rui P. Martins
Favorite | TC[WOS]:12 TC[Scopus]:18  IF:4.0/3.7 | Submit date：2019/03/12
8-phase Ring Voltage-controlled Oscillators (Rvco)  Cmos  Feedforward Coupling (Fc)  Phase Noise  Bimodal Oscillation  Clock Generation  Lo Generation  
20.5 A dual-symmetrical-output switched-capacitor converter with dynamic power cells and minimized cross regulation for application processors in 28nm CMOS Conference paper
Jiang, J., Lu, Y., Ki, W.-H., U, S.-P., Martins, R. P.. 20.5 A dual-symmetrical-output switched-capacitor converter with dynamic power cells and minimized cross regulation for application processors in 28nm CMOS[C], 2017.
Authors:  Jiang, J.;  Lu, Y.;  Ki, W.-H.;  U, S.-P.;  Martins, R. P.
Favorite |  | Submit date：2022/01/24
voltage-controlled oscillators  CMOS integrated circuits  low-power electronics  microprocessor chips  multiprocessing systems  power convertors  switched capacitor networks  
Transformer-Based Design Techniques for Oscillators and Frequency Dividers Book
Howard Cam Luong, Jun Yin. Transformer-Based Design Techniques for Oscillators and Frequency Dividers[M]. Switzerland:Springer, 2016.
Authors:  Howard Cam Luong;  Jun Yin
Favorite | TC[Scopus]:23 | Submit date：2019/04/03
Cmos Pll Synthesizers  Voltage-controlled Oscillators  Mm-wave Integrated Circuits And Systems  Cmos Radio-frequency Integrated Circuits  Integrated Frequency Synthesizers For Wireless Systems  Low Power Vco Design  Low-voltage Cmos Rf Frequency  Oscillators And Frequency Dividers  Phase-locked Loops  Synthesizers