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ZHU YAN [1]
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2017 [1]
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Solid-State Circ... [1]
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16.4 A 5mW 7b 2.4GS/s 1-then-2b/cycle SAR ADC with background offset calibration
Conference paper
Chan, C. H., Zhu, Y., Ho, I.M., Zhang, W.H., Martins, R. P.. 16.4 A 5mW 7b 2.4GS/s 1-then-2b/cycle SAR ADC with background offset calibration[C], 2017.
Authors:
Chan, C. H.
;
Zhu, Y.
;
Ho, I.M.
;
Zhang, W.H.
;
Martins, R. P.
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Submit date：2022/01/25
—Analog-to-digital converter (ADC)
successive approximation architecture
low power
switched-capacitor circuits.
