×
验证码:
换一张
Forgotten Password?
Stay signed in
Login With UMPASS
English
|
繁體
Login With UMPASS
Log In
ALL
ORCID
TI
AU
PY
SU
KW
TY
JN
DA
IN
PB
FP
ST
SM
Study Hall
Image search
Paste the image URL
Home
Faculties & Institutes
Scholars
Publications
Subjects
Statistics
News
Search in the results
Faculties & Institutes
INSTITUTE OF MIC... [3]
Faculty of Scien... [3]
THE STATE KEY LA... [2]
INSTITUTE OF APP... [1]
Faculty of Socia... [1]
Authors
MAK PUI IN [3]
CHEN YONG [2]
RUI PAULO DA SIL... [1]
UN KA FAI [1]
YU WEI HAN [1]
Document Type
Journal article [6]
Date Issued
2019 [3]
2018 [2]
2017 [1]
Language
英語English [6]
Source Publication
IEEE Transaction... [2]
IEEE TRANSACTION... [1]
IEEE TRANSACTION... [1]
IEEE Transaction... [1]
IEEE Transaction... [1]
Indexed By
SCIE [3]
Funding Organization
Funding Project
×
Knowledge Map
UM
Start a Submission
Submissions
Unclaimed
Claimed
Attach Fulltext
Bookmarks
Browse/Search Results:
1-6 of 6
Help
Selected(
0
)
Clear
Items/Page:
5
10
15
20
25
30
35
40
45
50
55
60
65
70
75
80
85
90
95
100
Sort:
Select
Issue Date Ascending
Issue Date Descending
Journal Impact Factor Ascending
Journal Impact Factor Descending
WOS Cited Times Ascending
WOS Cited Times Descending
Submit date Ascending
Submit date Descending
Title Ascending
Title Descending
Author Ascending
Author Descending
A 0.096-mm2 1-20-GHz triple-path noise- canceling common-gate common-source LNA with dual complementary pMOS-nMOS configuration
Journal article
Yu,Haohong, Chen,Yong, Boon,Chirn Chye, Mak,Pui In, Martins,Rui P.. A 0.096-mm2 1-20-GHz triple-path noise- canceling common-gate common-source LNA with dual complementary pMOS-nMOS configuration[J]. IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 2019, 68(1), 144-159.
Authors:
Yu,Haohong
;
Chen,Yong
;
Boon,Chirn Chye
;
Mak,Pui In
;
Martins,Rui P.
Favorite
|
TC[WOS]:
67
TC[Scopus]:
75
IF:
4.1
/
4.2
|
Submit date:2021/03/09
Cmos
Common Gate (Cg)
Common Source (Cs)
Input Third-order Intercept Point (Iip3)
Noise Figure (Nf)
Partial Distortion Canceling
Pmos-nmos Configuration
Resistive Feedback
Triple-path And Dual-path Noise CaNceling (Nc)
Wideband Input Matching
Wideband Low-noise Amplifier (Lna)
A 0.096-mm2 1-to-20-GHz Triple-Path Noise-Cancelling Common-Gate Common-Source LNA with Complementary pMOS-nMOS Configuration
Journal article
Yu, H., Chen, Y., Boon, C., Mak, P. I., Martins, R. P.. A 0.096-mm2 1-to-20-GHz Triple-Path Noise-Cancelling Common-Gate Common-Source LNA with Complementary pMOS-nMOS Configuration[J]. IEEE Transactions on Microwave Theory and Techniques, 2019, 144-159.
Authors:
Yu, H.
;
Chen, Y.
;
Boon, C.
;
Mak, P. I.
;
Martins, R. P.
Favorite
|
TC[WOS]:
67
TC[Scopus]:
75
|
Submit date:2022/01/25
Cmos
Common Gate (Cg)
Common Source (Cs)
Input Third-order Intercept Point (Iip3)
Noise Figure (Nf)
Partial Distortion Canceling
Pmos–nmos Configuration
Resistive Feedback
Triple-path And Dual-path Noise CaNceling (Nc)
Wideband Input Matching
Wideband Low-noise Amplifier (Lna)
A 0.044-mm2 0.5-To-7-GHz Resistor-Plus-Source-Follower-Feedback Noise-Cancelling LNA Achieving a Flat NF of 3.3±0.45 dB
Journal article
Haohong Yu, Yong Chen, Chirn Chye Boon, Chenyang Li, Pui-In Mak, Rui P. Martins. A 0.044-mm2 0.5-To-7-GHz Resistor-Plus-Source-Follower-Feedback Noise-Cancelling LNA Achieving a Flat NF of 3.3±0.45 dB[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2019, 66(1), 71-75.
Authors:
Haohong Yu
;
Yong Chen
;
Chirn Chye Boon
;
Chenyang Li
;
Pui-In Mak
; et al.
Favorite
|
TC[WOS]:
60
TC[Scopus]:
73
IF:
4.0
/
3.7
|
Submit date:2019/02/11
Cmos
Low-noise Amplifier (Lna)
Noise Cancelling
Noise Figure (Nf)
Resistor Feedback
Source Follower Feedback (Sff)
Wideband Input Impedance Matching
A 0.044-mm2 0.5-to-7-GHz Resistor-Plus-Source-Follower-Feedback Noise-Cancelling LNA Achieving a Flat NF of 3.3 ± 0.45 dB
Journal article
Yu, H., Chen, Y., Boon, C., Li, C., Mak, P. I., Martins, R. P.. A 0.044-mm2 0.5-to-7-GHz Resistor-Plus-Source-Follower-Feedback Noise-Cancelling LNA Achieving a Flat NF of 3.3 ± 0.45 dB[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2018, 1-5.
Authors:
Yu, H.
;
Chen, Y.
;
Boon, C.
;
Li, C.
;
Mak, P. I.
; et al.
Favorite
|
|
Submit date:2022/01/24
Noise cancelling
low-noise amplifier (LNA)
source follower feedback (SFF)
resistor feedback
CMOS
noise figure (NF)
wideband input impedance matching.
A 0.7-2.5 GHz, 61% EIRP System Efficiency, Four-Element MIMO TX System Exploiting Integrated Power-Relaxed Power Amplifiers and an Analog Spatial De-Interleaver
Journal article
Yu, Wei-Han, Un, Ka-Fai, Mak, Pui-In, Martins, Rui P.. A 0.7-2.5 GHz, 61% EIRP System Efficiency, Four-Element MIMO TX System Exploiting Integrated Power-Relaxed Power Amplifiers and an Analog Spatial De-Interleaver[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2018, 65(1), 14-25.
Authors:
Yu, Wei-Han
;
Un, Ka-Fai
;
Mak, Pui-In
;
Martins, Rui P.
Favorite
|
TC[WOS]:
3
TC[Scopus]:
3
IF:
5.2
/
4.5
|
Submit date:2018/10/30
Antenna Array
Beamforming
Cmos
Diversity Gain
Error-vector Magnitude (Evm)
Fading Channel
Mobile
Multiple-input Multiple-output (Mimo)
Mimo Decoder
Matching Network (Mn)
Pulse-shaping Filter (Psf)
Power Amplifier (Pa)
Transmitter (Tx)
Signal-to-noise Ratio (Snr)
Wideband
A 0.7–2.5 GHz, 61% EIRP System Efficiency, Four-Element MIMO TX System Exploiting Integrated Power-Relaxed Power Amplifiers and an Analog Spatial De-Interleaver
Journal article
Yu, W. H., Un, K. F., Mak, P. I., Martins, R. P.. A 0.7–2.5 GHz, 61% EIRP System Efficiency, Four-Element MIMO TX System Exploiting Integrated Power-Relaxed Power Amplifiers and an Analog Spatial De-Interleaver[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2017, 14-25.
Authors:
Yu, W. H.
;
Un, K. F.
;
Mak, P. I.
;
Martins, R. P.
Favorite
|
IF:
5.2
/
4.5
|
Submit date:2022/01/24
Antenna array
beamforming
CMOS
diversity gain
error-vector magnitude (EVM)
fading channel
mobile
multiple-input multiple-output (MIMO)
MIMO decoder
matching network (MN)
pulse-shaping filter (PSF)
power amplifier (PA)
transmitter (TX)
signal-to-noise ratio (SNR)
wideband