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A 0.45 V 147–375 nW ECG Compression Processor With Wavelet Shrinkage and Adaptive Temporal Decimation Architectures Journal article
Ieong, C. I., Li, M., Law, M. K., Mak, P. I., Vai, M. I., Martins, R. P.. A 0.45 V 147–375 nW ECG Compression Processor With Wavelet Shrinkage and Adaptive Temporal Decimation Architectures[J]. IEEE Transactions on Very Large Scale Integration Systems, 2017, 1307-1319.
Authors:  Ieong, C. I.;  Li, M.;  Law, M. K.;  Mak, P. I.;  Vai, M. I.; et al.
Favorite | TC[WOS]:25 TC[Scopus]:28  IF:2.8/2.8 | Submit date：2022/01/24
Adaptive Temporal Decimation (Atd)  Data Compression Processor  Electrocardiogram (Ecg)  Near-threshold Digital Logics  Wavelet Transform (Wt)  Wavelet Shrinkage (Ws)  
A 0.45 V 147-375 nW ECG Compression Processor With Wavelet Shrinkage and Adaptive Temporal Decimation Architectures Journal article
Ieong, Chio-In, Li, Mingzhong, Law, Man-Kay, Mak, Pui-In, Vai, Mang I., Martins, Rui P.. A 0.45 V 147-375 nW ECG Compression Processor With Wavelet Shrinkage and Adaptive Temporal Decimation Architectures[J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2017, 25(4), 1307-1319.
Authors:  Ieong, Chio-In;  Li, Mingzhong;  Law, Man-Kay;  Mak, Pui-In;  Vai, Mang I.; et al.
Favorite | TC[WOS]:25 TC[Scopus]:28  IF:2.8/2.8 | Submit date：2018/10/30
Adaptive Temporal Decimation (Atd)  Data Compression Processor  Electrocardiogram (Ecg)  Near-threshold Digital Logics  Wavelet Shrinkage (Ws)  Wavelet Transform (Wt)  
Formalising Scheduling Theories in Duration Calculus Journal article
QIWEN XU, NAIJUN ZHAN. Formalising Scheduling Theories in Duration Calculus[J]. Nordic Journal of Computing, 2008, 14, 173–201.
Authors:  QIWEN XU;  NAIJUN ZHAN
Favorite |  | Submit date：2019/05/29
Real Time Scheduling  Formal Proof  Duration Calculus  Temporal Logics  Schedulability Conditions