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2024 [1]
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A 23.2-to-26-GHz Low-Jitter Fast-Locking Sub-Sampling PLL Based on a Function-Reused VCO-Buffer and a Type-I FLL With Rapid Phase Alignment
Journal article
Li, Haoran, Xu, Tailong, Meng, Xi, Yin, Jun, Martins, Rui P., Mak, Pui In. A 23.2-to-26-GHz Low-Jitter Fast-Locking Sub-Sampling PLL Based on a Function-Reused VCO-Buffer and a Type-I FLL With Rapid Phase Alignment[J]. IEEE Journal of Solid-State Circuits, 2024.
Authors:
Li, Haoran
;
Xu, Tailong
;
Meng, Xi
;
Yin, Jun
;
Martins, Rui P.
; et al.
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Submit date：2024/10/10
Fast Locking
Frequency Synthesis
Frequency-locked Loop (Fll)
Low Jitter
Millimeter-wave (Mm-wave)
Phase-locked Loop (Pll)
Reference (Ref.) Spur
Sub-sampling Phase Detector (Sspd)
Voltage-controlled Oscillator (Vco)
