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Redundancy-free and load-balanced TGNN training with hierarchical pipeline parallelism Journal article
Xia, Yaqi, Zhang, Zheng, Yang, Donglin, Hu, Chuang, Zhou, Xiaobo, Chen, Hongyang, Sang, Qianlong, Cheng, Dazhao. Redundancy-free and load-balanced TGNN training with hierarchical pipeline parallelism[J]. IEEE Transactions on Parallel and Distributed Systems, 2024, 35(11), 1904-1919.
Authors:  Xia, Yaqi;  Zhang, Zheng;  Yang, Donglin;  Hu, Chuang;  Zhou, Xiaobo; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:5.6/4.5 | Submit date：2024/08/05
Communication Balance  Distributed Training  Dynamic Gnn  Pipeline Parallelism  Redundancy-free  
MPMoE: Memory Efficient MoE for Pre-Trained Models With Adaptive Pipeline Parallelism Journal article
Zhang, Zheng, Xia, Yaqi, Wang, Hulin, Yang, Donglin, Hu, Chuang, Zhou, Xiaobo, Cheng, Dazhao. MPMoE: Memory Efficient MoE for Pre-Trained Models With Adaptive Pipeline Parallelism[J]. IEEE Transactions on Parallel and Distributed Systems, 2024, 35(6), 843-856.
Authors:  Zhang, Zheng;  Xia, Yaqi;  Wang, Hulin;  Yang, Donglin;  Hu, Chuang; et al.
Favorite | TC[WOS]:0 TC[Scopus]:1  IF:5.6/4.5 | Submit date：2024/05/16
Distributed Training  Memory Redundancy  Mixture Of Experts  Performance Model  Pipeline Parallelism  
QUART: Latency-Aware FaaS System for Pipelining Large Model Inference Conference paper
Lin, Yanying, Li, Yanbo, Peng, Shijie, Tang, Yingfei, Luo, Shutian, Shen, Haiying, Xu, Chengzhong, Ye, Kejiang. QUART: Latency-Aware FaaS System for Pipelining Large Model Inference[C]:Institute of Electrical and Electronics Engineers Inc., 2024, 1-12.
Authors:  Lin, Yanying;  Li, Yanbo;  Peng, Shijie;  Tang, Yingfei;  Luo, Shutian; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0 | Submit date：2024/10/10
Large Model  Latency Aware  Pipeline Inference  Serverless  
MPipeMoE: Memory Efficient MoE for Pre-trained Models with Adaptive Pipeline Parallelism Conference paper
Zhang, Zheng, Yang, Donglin, Xia, Yaqi, Ding, Liang, Tao, Dacheng, Zhou, Xiaobo, Cheng, Dazhao. MPipeMoE: Memory Efficient MoE for Pre-trained Models with Adaptive Pipeline Parallelism[C], USA:Institute of Electrical and Electronics Engineers Inc., 2023, 167-177.
Authors:  Zhang, Zheng;  Yang, Donglin;  Xia, Yaqi;  Ding, Liang;  Tao, Dacheng; et al.
Favorite | TC[WOS]:1 TC[Scopus]:1 | Submit date：2023/08/08
Mixture Of Experts  Pipeline Parallelism  Distributed Training  Memory Efficiency  
Low-Power Nyquist ADCs Book chapter
出自: Analog Circuits and Signal Processing, Switzerland:Springer, 2023, 页码:131-180
Authors:  Minglei Zhang;  Chi-Hang Chan;  Yan Zhu;  Rui P. Martins
Favorite | TC[Scopus]:1 | Submit date：2023/08/03
Analog-to-digital Converter (Adc)  Calibration  Low Supply Voltage  Pipeline  Successive Approximation Register (Sar)  Time-domain Converter (Tdc)  
High-Performance Oversampling ADCs Book chapter
出自: Analog Circuits and Signal Processing, Switzerland:Springer, 2023, 页码:181-218
Authors:  Chi-Hang Chan;  Yan Zhu;  Liang Qi;  Sai Weng Sin;  Maurits Ortmanns; et al.
Favorite | TC[Scopus]:0 | Submit date：2023/08/03
Analog-to-digital Converter (Adc)  Cmos  Continuous-time Dsm (Ct Dsm)  Delta-sigma Modulator (Dsm)  Noise Shaping (Ns)  Oversampling  Pipeline Sar Adc  Successive Approximation Register (Sar)  
A 266-µW Bluetooth Low-Energy (BLE) Receiver Featuring an N-Path Passive Balun-LNA and a Pipeline Down-Mixing BB-Extraction Scheme Achieving 77dB SFDR and -3dBm OOB-B-1dB Journal article
Shao, Haijun, Mak, Pui-In, Qi, Gengzhen, Martins, Rui P.. A 266-µW Bluetooth Low-Energy (BLE) Receiver Featuring an N-Path Passive Balun-LNA and a Pipeline Down-Mixing BB-Extraction Scheme Achieving 77dB SFDR and -3dBm OOB-B-1dB[J]. IEEE Journal of Solid-State Circuits, 2022, 57(12), 3669–3680.
Authors:  Shao, Haijun;  Mak, Pui-In;  Qi, Gengzhen;  Martins, Rui P.
Adobe PDF | Favorite | TC[WOS]:8 TC[Scopus]:11  IF:4.6/5.6 | Submit date：2023/05/15
Balun-low-noise Amplifier (Balun-lna)  Bandpass Filtering  Baseband (Bb)  Bluetooth Low-energy (Ble)  Cmos  Hybrid Filter  Noise Figure (Nf)  Nonlinearity  N-path  Out-of-band (Oob)  Passive Gain  Pipeline  Spurious-free Dynamic Range (Sfdr)  Ultra-low-power (Ulp)  
A 20 MHz Bandwidth 79 dB SNDR SAR-Assisted Noise-Shaping Pipeline ADC with Gain and Offset Calibrations Journal article
Zhang, Yanbo, Zhang, Jin, Liu, Shubin, Ding, Ruixue, Zhu, Yan, Chan, Chi Hang, Martins, Rui P.. A 20 MHz Bandwidth 79 dB SNDR SAR-Assisted Noise-Shaping Pipeline ADC with Gain and Offset Calibrations[J]. IEEE Journal of Solid-State Circuits, 2022, 57(3), 745-756.
Authors:  Zhang, Yanbo;  Zhang, Jin;  Liu, Shubin;  Ding, Ruixue;  Zhu, Yan; et al.
Favorite | TC[WOS]:7 TC[Scopus]:10  IF:4.6/5.6 | Submit date：2022/03/28
Analog-to-digital Converter (Adc)  Inter-stage Gain And Offset Calibrations  Noise-shaping (Ns)  Split Adc  Successive Approximation Register (Sar)-assisted Pipeline  
A 40-MHz Bandwidth 75-dB SNDR Partial-Interleaving SAR-Assisted Noise-Shaping Pipeline ADC Journal article
Song,Yan, Zhu,Yan, Chan,Chi Hang, Martins,Rui P.. A 40-MHz Bandwidth 75-dB SNDR Partial-Interleaving SAR-Assisted Noise-Shaping Pipeline ADC[J]. IEEE Journal of Solid-State Circuits, 2021, 56(6), 1772-1783.
Authors:  Song,Yan;  Zhu,Yan;  Chan,Chi Hang;  Martins,Rui P.
Favorite | TC[WOS]:14 TC[Scopus]:17  IF:4.6/5.6 | Submit date：2021/03/09
Analog-to-digital Converter (Adc)  Noise-shaping (Ns)  Offset Calibration  Successive Approximation Register (Sar)-assisted Pipeline  Time Interleaving  
A 3.3-GS/s 6-b Fully Dynamic Pipelined ADC With Linearized Dynamic Amplifier Journal article
Zihao Zheng, Lai Wei, Jorge Lagos, Ewout Martens, Yan Zhu, Chi Hang Chan, Jan Craninckx, Rui P. Martins. A 3.3-GS/s 6-b Fully Dynamic Pipelined ADC With Linearized Dynamic Amplifier[J]. IEEE Journal of Solid-State Circuits, 2021.
Authors:  Zihao Zheng;  Lai Wei;  Jorge Lagos;  Ewout Martens;  Yan Zhu; et al.
Favorite | TC[WOS]:8 TC[Scopus]:9  IF:4.6/5.6 | Submit date：2021/09/20
Analog-to-digital Conversion  Calibration  Calibration  Dynamic Amplifier (Da)  Hardware  Linearity  Linearization Technique  Pipeline Processing  Pipelined Analog-to-digital Converter (Adc).  Quantization (Signal)  Signal Resolution  System-on-chip