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A 14-Bit Split-Pipeline ADC with Self-Adjusted Opamp-Sharing Duty-Cycle and Bias Current Journal article
Mao J., Guo M., Sin S.-W., Martins R.P.. A 14-Bit Split-Pipeline ADC with Self-Adjusted Opamp-Sharing Duty-Cycle and Bias Current[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2018, 65(10), 1380-1384.
Authors:  Mao J.;  Guo M.;  Sin S.-W.;  Martins R.P.
Favorite | TC[WOS]:8 TC[Scopus]:10 | Submit date：2019/02/11
Analog-to-digital Conversion  Digital Background Calibration  Opamp-sharing Technique  Pipelined Adc  Split Adc  
A 14-Bit Split-Pipeline ADC With Self-Adjusted Opamp-Sharing Duty-Cycle and Bias Current Journal article
Mao, Jiaji, Guo, Mingqiang, Sin, Sai-Weng, Martins, Rui Paulo. A 14-Bit Split-Pipeline ADC With Self-Adjusted Opamp-Sharing Duty-Cycle and Bias Current[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2018, 65(10), 1380-1384.
Authors:  Mao, Jiaji;  Guo, Mingqiang;  Sin, Sai-Weng;  Martins, Rui Paulo
Adobe PDF | Favorite | TC[WOS]:8 TC[Scopus]:10  IF:4.0/3.7 | Submit date：2018/10/30
Analog-to-digital Conversion  Digital Background Calibration  Pipelined Adc  Split Adc  Opamp-sharing Technique  
A 4.2mW 77.1dB-SNDR 5MHz-BW DT 2-1 MASH ΔΣ Modulator with Multirate Opamp Sharing Journal article
Qi, L., Sin, W., U, S.P., Maloberti, F., Martins, R. P.. A 4.2mW 77.1dB-SNDR 5MHz-BW DT 2-1 MASH ΔΣ Modulator with Multirate Opamp Sharing[J]. IEEE Transactions on Circuits and Systems I - Regular Papers, 2017, 2641-2654.
Authors:  Qi, L.;  Sin, W.;  U, S.P.;  Maloberti, F.;  Martins, R. P.
Favorite |   IF:5.2/4.5 | Submit date：2022/01/24
Analog-to-digital Converter (Adc)  Discrete-time (Dt) Delta Sigma (Δς) Modulator  Multi-stage Noise Shaping (Mash)  Wideband  Power-efficient  Opamp Sharing  Multirate  Sar Quantizer  
A 4.2-mW 77.1-dB SNDR 5-MHz BW DT 2-1 MASH Delta Sigma Modulator With Multirate Opamp Sharing Journal article
Liang Qi, Sai-Weng Sin, Seng-Pan, U., Franco Maloberti, Rui Paulo Martins. A 4.2-mW 77.1-dB SNDR 5-MHz BW DT 2-1 MASH Delta Sigma Modulator With Multirate Opamp Sharing[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2017, 64(10), 2641-2654.
Authors:  Liang Qi;  Sai-Weng Sin;  Seng-Pan, U.;  Franco Maloberti;  Rui Paulo Martins
Favorite | TC[WOS]:35 TC[Scopus]:44  IF:5.2/4.5 | Submit date：2018/10/30
Analog-to-digital Converter (Adc)  Discrete-time (Dt) Delta Sigma (Delta Sigma) Modulator  Multi-stage Noise Shaping (Mash)  Wideband  Power-efficient  Opamp Sharing  Multirate  Successive Approximation Register (Sar) Quantizer