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16.3 A Single-Channel 5.5mW 3.3GS/s 6b Fully Dynamic Pipelined ADC with Post-Amplification Residue Generation
Conference paper
Zheng, Z., Wei, W., Lagos, J., Martens, E., Zhu, Y., Chan, C. H., Craninckx, J., Martins, R. P.. 16.3 A Single-Channel 5.5mW 3.3GS/s 6b Fully Dynamic Pipelined ADC with Post-Amplification Residue Generation[C], 2020.
Authors:
Zheng, Z.
;
Wei, W.
;
Lagos, J.
;
Martens, E.
;
Zhu, Y.
; et al.
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|
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Submit date:2022/01/25
Amplifiers
Analogue-digital Conversion
Calibration
Interpolation
Dynamic Pipelined Adc
Dynamic Pipelined Architecture
Linearized Dynamic Amplifier
Post-amplification Residue Generation Scheme
Residue Amplification
Complex Residue-transferring Realization
Residue Amplifier
Power Consumption
Sar Adc
Calibration Complexity
Aggressive Interpolation Factor
Flash Adc
Mm-wave 5g Receivers
Adc-based Serial Links
Power 5.5 Mw
Calibration
Quantization (Signal)
Clocks
System-on-chip
Interpolation
Prototype
Hairpin-structured PCR enhancer for microfluidic platforms
Conference paper
Shen,Ren, Jia,Yanwei, Mak,Pui In, Martins,Rui P.. Hairpin-structured PCR enhancer for microfluidic platforms[C], 2019, 795-796.
Authors:
Shen,Ren
;
Jia,Yanwei
;
Mak,Pui In
;
Martins,Rui P.
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TC[Scopus]:
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Submit date:2021/03/04
Microfluidics
On-chip Amplification
Pcr Enhancer