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A 3.36-GHz Locking-Tuned Type-I Sampling PLL with -78.6-dBc Reference Spur Merging Single-Path Reference-Feedthrough-Suppression and Narrow-Pulse-Shielding Techniques
Journal article
Huang, Yunbo, Chen, Yong, Jiao, Hailong, Mak, Pui In, Martins, Rui P.. A 3.36-GHz Locking-Tuned Type-I Sampling PLL with -78.6-dBc Reference Spur Merging Single-Path Reference-Feedthrough-Suppression and Narrow-Pulse-Shielding Techniques[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2021, 68(9), 3093-3097.
Authors:
Huang, Yunbo
;
Chen, Yong
;
Jiao, Hailong
;
Mak, Pui In
;
Martins, Rui P.
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TC[WOS]:
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TC[Scopus]:
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Submit date：2021/09/20
Cmos
Narrow Pulse Shielding
Reference (Ref) Feedthrough Suppression
Sampling Phase-locked Loop (S-pll)
T-shape Switch
Type-i
Voltage-controlled Oscillator (Vco)
