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Design of a 4.2-to-5.1 GHz Ultralow-Power Complementary Class-B/C Hybrid-Mode VCO in 65-nm CMOS Fully Supported by EDA Tools Journal article
Martins,Ricardo, Lourenco,Nuno, Horta,Nuno, Zhong,Shenke, Yin,Jun, Mak,Pui In, Martins,Rui P.. Design of a 4.2-to-5.1 GHz Ultralow-Power Complementary Class-B/C Hybrid-Mode VCO in 65-nm CMOS Fully Supported by EDA Tools[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2020, 67(11), 3965-3977.
Authors:  Martins,Ricardo;  Lourenco,Nuno;  Horta,Nuno;  Zhong,Shenke;  Yin,Jun; et al.
Favorite | TC[WOS]:16 TC[Scopus]:25  IF:5.2/4.5 | Submit date：2021/03/04
Automatic Layout Generation  Electronic Design Automation  Multi-objective Optimization  Nanometer Cmos  Ultralow-power  Voltage-controlled Oscillator  
Design techniques for nanometer wideband power-efficient CMOS ADCs Conference paper
Seng-Pan U., Sin S.-W., Zhu Y., Chio U.-F., Wei H.-G., Martins R.P.. Design techniques for nanometer wideband power-efficient CMOS ADCs[C], 2011, 173-176.
Authors:  Seng-Pan U.;  Sin S.-W.;  Zhu Y.;  Chio U.-F.;  Wei H.-G.; et al.
Favorite | TC[Scopus]:0 | Submit date：2019/02/11
Analog-to-digital Converters  Nanometer Cmos  Successive Approximation