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A 160-MHz BW 68-dB SNDR 36.2 mW Continuous-Time Pipelined ΔΣ ADC With DAC Image Prefiltering Journal article
Li, Ke, Gong, Haoyu, Xianyu, Congzhou, Li, Zhensheng, Qi, Liang, Guo, Mingqiang, Martins, Rui P., Sin, Sai Weng. A 160-MHz BW 68-dB SNDR 36.2 mW Continuous-Time Pipelined ΔΣ ADC With DAC Image Prefiltering[J]. IEEE Journal of Solid-State Circuits, 2024.
Authors:  Li, Ke;  Gong, Haoyu;  Xianyu, Congzhou;  Li, Zhensheng;  Qi, Liang; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:4.6/5.6 | Submit date：2025/01/13
Analog-to-digital Converter (Adc)  Cascade Of Integrators With Feedforward (Ciff)  Continuous Time (Ct)  Ct Pipeline (Ctp)  Excess Loop Delay (Eld)  Low-pass Filter (Lpf)  Multistage Noise-shaping (Mash)  Offset Calibration  Signal Transfer Function (Stf) Peaking  
Discrete-time mash delta-sigma modulator with second-order digital noise coupling for wideband high-resolution applications Conference paper
Qin, Xinyu, Zhang, Jingying, Qi, Liang, Sin, Sai Weng, Martins, Rui P., Wang, Guoxing. Discrete-time mash delta-sigma modulator with second-order digital noise coupling for wideband high-resolution applications[C], 2021.
Authors:  Qin, Xinyu;  Zhang, Jingying;  Qi, Liang;  Sin, Sai Weng;  Martins, Rui P.; et al.
Favorite | TC[WOS]:2 TC[Scopus]:9 | Submit date：2021/09/20
Digital Noise Coupling  Multistage Noise Shaping (Mash)  Noise Leakage  Wideband High-resolution Applications  Δς Modulator (Dsm)