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A 521pW, 0.016%/V Line Sensitivity Self-Biased CMOS Voltage Reference With DIBL Effect Compensation Using Adaptive VGS Control Journal article
Yu, Kai, Yang, Shangru, Li, Sizhen, Huang, Mo. A 521pW, 0.016%/V Line Sensitivity Self-Biased CMOS Voltage Reference With DIBL Effect Compensation Using Adaptive VGS Control[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2024, 71(4), 1754-1758.
Authors:  Yu, Kai;  Yang, Shangru;  Li, Sizhen;  Huang, Mo
Favorite | TC[WOS]:1 TC[Scopus]:1  IF:4.0/3.7 | Submit date：2024/05/02
Cmos Voltage Reference  Dibl Effect Compensation  Line Sensitivity  Power Supply Rejection Ratio  Self-biased  Ultra-low Power  
Evaluation and Perspective of Analog Low-Dropout Voltage Regulators: A Review Journal article
TAN YEE CHYAN, HARIKRISHNAN RAMIAH, S. F. WAN MUHAMAD HATTA, NAI SHYAN LAI, CHEE-CHEOW LIM, YONG CHEN, PUI-IN MAK, RUI P. MARTINS. Evaluation and Perspective of Analog Low-Dropout Voltage Regulators: A Review[J]. IEEE Access, 2022, 10, 114469-114489.
Authors:  TAN YEE CHYAN;  HARIKRISHNAN RAMIAH;  S. F. WAN MUHAMAD HATTA;  NAI SHYAN LAI;  CHEE-CHEOW LIM; et al.
Favorite | TC[WOS]:12 TC[Scopus]:16  IF:3.4/3.7 | Submit date：2023/01/30
Adaptive Biasing  Analog Ldos (Aldo)  Bulk Modulation  Capacitor-less Output  Charge Pump  Flipped Voltage Follower (Fvf)  Linear Low-dropout Regulators (Ldos)  Power Management Integrated Circuits (Pmics)  Power Supply Rejection (Psr)  
A low dropout regulator with PSR under-48dB up to 20GHz for a SARADC reference buffer Conference paper
Yi Zeng, Chi-Hang Chan, Yan Zhu, Rui P. Martins. A low dropout regulator with PSR under-48dB up to 20GHz for a SARADC reference buffer[C], 2022.
Authors:  Yi Zeng;  Chi-Hang Chan;  Yan Zhu;  Rui P. Martins
Favorite | TC[WOS]:0 TC[Scopus]:0 | Submit date：2023/03/06
Low Dropout Regulator (Ldo)  High Power Supply Rejection (Psr)  Reference Buffer  Successive-approximation-register (Sar)  Analog-to-digital Converter (Adc)  
A Fully Integrated FVF LDO with Enhanced Full-Spectrum Power Supply Rejection Journal article
Cai,Guigang, Lu,Yan, Zhan,Chenchang, Martins,Rui P.. A Fully Integrated FVF LDO with Enhanced Full-Spectrum Power Supply Rejection[J]. IEEE Transactions on Power Electronics, 2021, 36(4), 4326-4337.
Authors:  Cai,Guigang;  Lu,Yan;  Zhan,Chenchang;  Martins,Rui P.
Favorite | TC[WOS]:58 TC[Scopus]:70  IF:6.6/6.9 | Submit date：2021/03/04
Flipped Voltage Follower (Fvf)  Full-spectrum Power Supply Rejection (Psr)  Fully-integrated Low-dropout (Ldo)  Low-dropout Regulator (Ldo)  Psr  
Review of Analog-Assisted-Digital and Digital-Assisted-Analog Low Dropout Regulators Journal article
Huang,Mo, Lu,Yan, Martins,Rui P.. Review of Analog-Assisted-Digital and Digital-Assisted-Analog Low Dropout Regulators[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2021, 68(1), 24-29.
Authors:  Huang,Mo;  Lu,Yan;  Martins,Rui P.
Favorite | TC[WOS]:18 TC[Scopus]:23  IF:4.0/3.7 | Submit date：2021/03/04
Analog-assisted-digital  Digital-assisted-analog  Low Dropout Regulator  Power Supply Rejection  Transient Response  
A comparative study of digital low dropout regulators Journal article
Huang,Mo, Lu,Yan, Martins,Rui P.. A comparative study of digital low dropout regulators[J]. Journal of Semiconductors, 2020, 41(11), 111405.
Authors:  Huang,Mo;  Lu,Yan;  Martins,Rui P.
Favorite | TC[WOS]:8 TC[Scopus]:12  IF:4.8/3.3 | Submit date：2021/03/04
Digital Control  Fast Transient Response  Integrated Voltage Regulator  Low Dropout Regulator (Ldo)  Power Supply Rejection (Psr)  
An Analog-Proportional Digital-Integral Multiloop Digital LDO with PSR Improvement and LCO Reduction Journal article
Huang,Mo, Lu,Yan, Martins,Rui P.. An Analog-Proportional Digital-Integral Multiloop Digital LDO with PSR Improvement and LCO Reduction[J]. IEEE Journal of Solid-State Circuits, 2020, 55(6), 1637-1650.
Authors:  Huang,Mo;  Lu,Yan;  Martins,Rui P.
Favorite | TC[WOS]:4 TC[Scopus]:31  IF:4.6/5.6 | Submit date：2021/03/04
Digital  Fast Response  Low Dropout Regulator (Ldo)  Power Supply Rejection (Psr)  Proportional-integral (Pi) Control  
A 0.6-V 13-bit 20-MS/s Two-Step TDC-Assisted SAR ADC with PVT Tracking and Speed-Enhanced Techniques Journal article
Zhang,Minglei, Chan,Chi Hang, Zhu,Yan, Martins,Rui P.. A 0.6-V 13-bit 20-MS/s Two-Step TDC-Assisted SAR ADC with PVT Tracking and Speed-Enhanced Techniques[J]. IEEE Journal of Solid-State Circuits, 2019, 54(12), 3396-3409.
Authors:  Zhang,Minglei;  Chan,Chi Hang;  Zhu,Yan;  Martins,Rui P.
Favorite | TC[WOS]:27 TC[Scopus]:41  IF:4.6/5.6 | Submit date：2021/03/09
Analog-to-digital Converter (Adc)  Low Power Supply  Process  Voltage  And Temperature (Pvt) Robustness  Successive Approximation Register (Sar)  Threshold Crossing Detector  Time Residue Generator (Trg)  Time-domain Adc  Time-to-digital Converter (Tdc)  Two-step Tdc  Voltage-to-time Converter (Vtc)  
An Analog-Proportional Digital-Integral Multi-Loop Digital LDO with Fast Response, Improved PSR and Zero Minimum Load Current Conference paper
Huang,Mo, Lu,Yan. An Analog-Proportional Digital-Integral Multi-Loop Digital LDO with Fast Response, Improved PSR and Zero Minimum Load Current[C], IEEE, 345 E 47TH ST, NEW YORK, NY 10017 USA:IEEE, 2019, 8780307.
Authors:  Huang,Mo;  Lu,Yan
Favorite | TC[WOS]:4 TC[Scopus]:14 | Submit date：2021/03/11
Low Dropout Regulator (Ldo)  Proportional-integral (Pi) Control  Power Supply Rejection (Psr)  Fast Response  
A Reconfigurable Switched-Capacitor DC-DC Converter and Cascode LDO for Dynamic Voltage Scaling and High PSR Conference paper
Lu，Yan. A Reconfigurable Switched-Capacitor DC-DC Converter and Cascode LDO for Dynamic Voltage Scaling and High PSR[C], 2018, 509-511.
Authors:  Lu，Yan
Favorite | TC[Scopus]:7 | Submit date：2021/03/11
DC-DC converter  low-dropout regulator (LDO)  power supply rejection  switched-capacitor power converter