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The Software/Hardware Co-Design and Implementation of SM2/3/4 Encryption/Decryption and Digital Signature System Journal article
Zheng, Xin, Xu, Chongyao, Hu, Xianghong, Zhang, Yun, Xiong, Xiaoming. The Software/Hardware Co-Design and Implementation of SM2/3/4 Encryption/Decryption and Digital Signature System[J]. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 39(10), 2055-2066.
Authors:  Zheng, Xin;  Xu, Chongyao;  Hu, Xianghong;  Zhang, Yun;  Xiong, Xiaoming
Favorite | TC[WOS]:18 TC[Scopus]:31  IF:2.7/2.9 | Submit date:2021/12/06
Encryption/decryption  Parallel Processing  Signature/verification  Sm2/3/4  Software/hardware (Sw/hw) Co-design  
Comparison Between PSCAD and RTDS Hardware In-the-Loop Simulations System in Power Quality Conference paper
Ying Pang, Zeng Xiang, Man-Chung Wong. Comparison Between PSCAD and RTDS Hardware In-the-Loop Simulations System in Power Quality[C]:IEEE, 2019.
Authors:  Ying Pang;  Zeng Xiang;  Man-Chung Wong
Favorite | TC[Scopus]:2 | Submit date:2021/03/09
Hardware In-the-loop (Hil) System  Power Compensator  Power Systems Computer Aided Design (Pscad)  Real Time Digital Power System Simulator (Rtds)  
Architectural hardware design of modulator and demodulator for galvanic coupling intra-body communication Conference paper
Wang M., Wang Z., Li J., Wan F.. Architectural hardware design of modulator and demodulator for galvanic coupling intra-body communication[C], 2015.
Authors:  Wang M.;  Wang Z.;  Li J.;  Wan F.
Favorite | TC[WOS]:1 TC[Scopus]:2 | Submit date:2018/12/24
Carrier Recovery  Clock Synchronization  Dds  Fpga  Hardware Design  Intra-body Communication (Ibc)  Qpsk  
An animatable operational semantics of the Verilog hardware description language Conference paper
Bowen J.P., He J., Xu Q.. An animatable operational semantics of the Verilog hardware description language[C], 2000, 199-207.
Authors:  Bowen J.P.;  He J.;  Xu Q.
Favorite | TC[WOS]:11 TC[Scopus]:18 | Submit date:2019/04/04
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