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An FPGA-Based Transformer Accelerator With Parallel Unstructured Sparsity Handling for Question-Answering Applications Journal article
Cao, Rujian, Zhao, Zhongyu, Un, Ka Fai, Yu, Wei Han, Martins, Rui P., Mak, Pui In. An FPGA-Based Transformer Accelerator With Parallel Unstructured Sparsity Handling for Question-Answering Applications[J]. IEEE Transactions on Circuits and Systems II-Express Briefs, 2024, 71(11), 4688-4692.
Authors:  Cao, Rujian;  Zhao, Zhongyu;  Un, Ka Fai;  Yu, Wei Han;  Martins, Rui P.; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:4.0/3.7 | Submit date：2024/10/10
Sparse Matrices  Computational Modeling  Transformers  Hardware  Energy Efficiency  Circuits  Throughput  Dataflow  Digital Accelerator  Energy-efficient  Field-programmable Gate Array (Fpga)  Sparsity  Transformer  
Heterogeneity-Aware Coordination for Federated Learning via Stitching Pre-trained blocks Conference paper
Zhan, Shichen, Wu, Yebo, Tian, Chunlin, Zhao, Yan, Li, Li. Heterogeneity-Aware Coordination for Federated Learning via Stitching Pre-trained blocks[C]:Institute of Electrical and Electronics Engineers Inc., 2024.
Authors:  Zhan, Shichen;  Wu, Yebo;  Tian, Chunlin;  Zhao, Yan;  Li, Li
Favorite | TC[WOS]:0 TC[Scopus]:1 | Submit date：2024/11/05
Federated Learning  Pre-training  Resource-efficient  Training  Performance Evaluation  Energy Consumption  Accuracy  Memory Management  Quality Of Service  
Multi-UAV Aided Multi-Access Edge Computing in Marine Communication Networks: A Joint System-Welfare and Energy-Efficient Design Journal article
Dai Minghui, Dou Chenglong, Wu Yuan, Qian Liping, Lu Rongxing, Quek Tony Q.S.. Multi-UAV Aided Multi-Access Edge Computing in Marine Communication Networks: A Joint System-Welfare and Energy-Efficient Design[J]. IEEE Transactions on Communications, 2024, 72(9), 5517-5531.
Authors:  Dai Minghui;  Dou Chenglong;  Wu Yuan;  Qian Liping;  Lu Rongxing; et al.
Favorite | TC[WOS]:2 TC[Scopus]:2  IF:7.2/6.3 | Submit date：2024/05/16
Marine Communication Networks  Multi-access Edge Computing  Energy-efficient Resource Allocation  
Channel Sharing aided Integrated Sensing and Communication: An Energy-Efficient Sensing Scheduling Approach Journal article
Dou Chenglong, Huang Ning, Wu Yuan, Qian Liping, Quek Tony Q.S.. Channel Sharing aided Integrated Sensing and Communication: An Energy-Efficient Sensing Scheduling Approach[J]. IEEE Transactions on Wireless Communications, 2024, 23(5), 4802-4814.
Authors:  Dou Chenglong;  Huang Ning;  Wu Yuan;  Qian Liping;  Quek Tony Q.S.
Favorite | TC[WOS]:2 TC[Scopus]:5  IF:8.9/8.6 | Submit date：2024/02/22
Integrated Sensing And Communication (Isac)  Energy-efficient Sensing Scheduling  Channel Sharing  Matching Game  
Energy-Efficient UAV Scheduling and Probabilistic Task Offloading for Digital Twin-Empowered Consumer Electronics Industry Journal article
Huang, Xumin, Zhang, Yang, Qi, Yuanhang, Huang, Caishi, Hossain, M. Shamim. Energy-Efficient UAV Scheduling and Probabilistic Task Offloading for Digital Twin-Empowered Consumer Electronics Industry[J]. IEEE Transactions on Consumer Electronics, 2024, 70(1), 2145-2154.
Authors:  Huang, Xumin;  Zhang, Yang;  Qi, Yuanhang;  Huang, Caishi;  Hossain, M. Shamim
Favorite | TC[WOS]:0 TC[Scopus]:2  IF:4.3/3.9 | Submit date：2024/05/16
Autonomous Aerial Vehicles  Consumer Electronics  Consumer Electronics Industry  Digital Twin  Energy-efficient Uav Scheduling  Industrial Internet Of Things  Industries  Job Shop Scheduling  Manufacturing Processes  Probabilistic Task Offloading  Task Analysis  Uav  
A Second-Order NS Pipelined SAR ADC with Quantization-Prediction-Unrolled Gain Error Shaping and Fully Passive Integrator Journal article
Zhang, Hongshuai, Zhu, Yan, Martins, Rui P., Chan, Chi Hang. A Second-Order NS Pipelined SAR ADC with Quantization-Prediction-Unrolled Gain Error Shaping and Fully Passive Integrator[J]. IEEE Journal of Solid-State Circuits, 2023, 58(12), 3565-3575.
Authors:  Zhang, Hongshuai;  Zhu, Yan;  Martins, Rui P.;  Chan, Chi Hang
Favorite | TC[WOS]:2 TC[Scopus]:4  IF:4.6/5.6 | Submit date：2024/01/02
Analog-to-digital Converter (Adc)  Auxiliary Noise Shaping (Ns) Successive-approximation Register (Sar) Adc  Capacitor Stacking  Data-weighted Averaging And detect-And-skip (Dwa And Das)  Differential Sampling  Energy Efficient  Error SupprEssion (Es) And Reconstruction  Gain Error Shaping (Ges)  Partial Time Interleaving  Passive Ns  Pipelined Sar  Quantization Predication Unrolled  Two-step Floating Inverter Amplifier (Fia)  
Enhancing Energy Storage and Utilization of Triboelectric Nanogenerator by a Synchronized Charge Accumulation Circuit Journal article
Li,Wenbo, Zhang,Baosen, Yuan,Zitang, Shen,Ping, Yu,Xin, Wang,Zhong Lin, Cheng,Tinghai. Enhancing Energy Storage and Utilization of Triboelectric Nanogenerator by a Synchronized Charge Accumulation Circuit[J]. IEEE Transactions on Power Electronics, 2023, 38(8), 9294-9301.
Authors:  Li,Wenbo;  Zhang,Baosen;  Yuan,Zitang;  Shen,Ping;  Yu,Xin; et al.
Favorite | TC[WOS]:2 TC[Scopus]:3  IF:6.6/6.9 | Submit date：2023/08/03
Efficient Energy Storage  Performance Improvement  Pmos  Synchronized Charge Accumulation Circuit (Scac)  Triboelectric Nanogenerator (Teng)  
A 0.0043-mm 0.085- W/MHz Relaxation Oscillator Using Charge-Prestored Asymmetric Swings R-RC Network Journal article
Wei,Yuchen, Yang,Shiheng, Liu,Yueduo, Bao,Rongxin, Zhu,Zihao, Lin,Jiahui, Zhang,Zehao, Chen,Yong, Yin,Jun, Mak,Pui In, Li,Qiang. A 0.0043-mm 0.085- W/MHz Relaxation Oscillator Using Charge-Prestored Asymmetric Swings R-RC Network[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2023, 31(8), 1248-1252.
Authors:  Wei,Yuchen;  Yang,Shiheng;  Liu,Yueduo;  Bao,Rongxin;  Zhu,Zihao; et al.
Favorite | TC[WOS]:1 TC[Scopus]:2  IF:2.8/2.8 | Submit date：2023/08/03
Charge-prestored  Cmos  Energy Efficient  Inverter-based  Low Power  R-rc  Relaxation Oscillator  
An FPGA-Based Transformer Accelerator Using Output Block Stationary Dataflow for Object Recognition Applications Journal article
Zhao, Zhongyu, Cao, Rujian, Un, Ka Fai, Yu, Wei Han, Mak, Pui In, Martins, Rui P.. An FPGA-Based Transformer Accelerator Using Output Block Stationary Dataflow for Object Recognition Applications[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2023, 70(1), 281-285.
Authors:  Zhao, Zhongyu;  Cao, Rujian;  Un, Ka Fai;  Yu, Wei Han;  Mak, Pui In; et al.
Favorite | TC[WOS]:8 TC[Scopus]:12  IF:4.0/3.7 | Submit date：2022/08/08
Transformers  Energy Efficiency  Broadcasting  Convolutional Neural Networks  Integrated Circuit Modeling  Field Programmable Gate Arrays  Random Access Memory  Dataflow  Digital Accelerator  Energy-efficient  Field-programmable Gate Array (Fpga)  Energy Efficiency  Image Recognition  Transformer  
An Inherent Gain Error Tolerance Noise-Shaping SAR-Assisted Pipeline ADC with Code-Counter-Based Offset Calibration Journal article
Zhang, Hongshuai, Zhu, Yan, Chan, Chi Hang, Martins, Rui P.. An Inherent Gain Error Tolerance Noise-Shaping SAR-Assisted Pipeline ADC with Code-Counter-Based Offset Calibration[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2022, 57(5), 1480-1491.
Authors:  Zhang, Hongshuai;  Zhu, Yan;  Chan, Chi Hang;  Martins, Rui P.
Favorite | TC[WOS]:8 TC[Scopus]:10  IF:4.6/5.6 | Submit date：2022/05/13
Amplifier Linearity Enhancement  Analog-to-digital Converter (Adc)  Background Offset Calibration  Digital Reconstruction Filter  Dwa  Energy And Area Efficient  Inherent Gain Error Tolerant  Inter-stage Gain Error  Noise Shaping (Ns)  Oversampling  Partial Interleaving  Pipelined Successive Approximation (Sar)  Quantization Leakage Error