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A 16-mW 1-GS/s With 49.6-dB SNDR TI-SAR ADC for Software-Defined Radio in 65-nm CMOS Journal article
Qiu, Lei, Tang, Kai, Zheng, Yuanjin, Siek, Liter, Zhu, Yan, U, Seng-Pan. A 16-mW 1-GS/s With 49.6-dB SNDR TI-SAR ADC for Software-Defined Radio in 65-nm CMOS[J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2018, 26(3), 572-583.
Authors:  Qiu, Lei;  Tang, Kai;  Zheng, Yuanjin;  Siek, Liter;  Zhu, Yan; et al.
Favorite | TC[WOS]:15 TC[Scopus]:16  IF:2.8/2.8 | Submit date：2018/10/30
Digital Background Calibration  Subradix-2  Successive Pproximation Register (Sar) Analog-to-digital Converters (Adcs)  Time Interleaved (Ti)  Time Skew