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Fully Symmetrical Obfuscated Interconnection and Weak-PUF-Assisted Challenge Obfuscation Strong PUFs Against Machine-Learning Modeling Attacks Journal article
Xu, Chongyao, Zhang, Litao, Mak, Pui In, Martins, Rui P., Law, Man Kay. Fully Symmetrical Obfuscated Interconnection and Weak-PUF-Assisted Challenge Obfuscation Strong PUFs Against Machine-Learning Modeling Attacks[J]. IEEE Transactions on Information Forensics and Security, 2024, 19, 3927-3942.
Authors:  Xu, Chongyao;  Zhang, Litao;  Mak, Pui In;  Martins, Rui P.;  Law, Man Kay
Favorite | TC[WOS]:2 TC[Scopus]:4  IF:6.3/7.3 | Submit date：2024/05/16
Physical Unclonable Function (Puf)  Machine Learning (Ml)  Modeling Attack  Symmetrical Obfuscated Interconnection (Soi)  Challenge Obfuscation  Reverse Engineering (Re)  
Modeling Attack Resistant Strong PUF Exploiting Stagewise Obfuscated Interconnections With Improved Reliability Journal article
Xu, Chongyao, Zhang, Litao, Law, Man Kay, Zhao, Xiaojin, Mak, Pui In, Martins, Rui P.. Modeling Attack Resistant Strong PUF Exploiting Stagewise Obfuscated Interconnections With Improved Reliability[J]. IEEE Internet of Things Journal, 2023, 10(18), 16300 - 16315.
Authors:  Xu, Chongyao;  Zhang, Litao;  Law, Man Kay;  Zhao, Xiaojin;  Mak, Pui In; et al.
Favorite | TC[WOS]:10 TC[Scopus]:15  IF:8.2/9.0 | Submit date：2023/08/03
Field-programmable Gate Array (Fpga)  Machine Learning (Ml) Modeling Attack  Obfuscated Interconnection (Oi)  Physical Unclonable Function (Puf)  
Transfer-Path-Based Hardware-Reuse Strong PUF Achieving Modeling Attack Resilience With >200 Million Training CRPs Journal article
Xu, Chongyao, Zhang, Jieyun, Law, Man-Kay, Zhao, Xiaojin, Mak, Pui-In, Martins, Rui P.. Transfer-Path-Based Hardware-Reuse Strong PUF Achieving Modeling Attack Resilience With >200 Million Training CRPs[J]. IEEE Transactions on Information Forensics and Security, 2023, 18, 2188 - 2203.
Authors:  Xu, Chongyao;  Zhang, Jieyun;  Law, Man-Kay;  Zhao, Xiaojin;  Mak, Pui-In; et al.
Favorite | TC[WOS]:4 TC[Scopus]:6  IF:6.3/7.3 | Submit date：2023/03/29
Field-programmable Gate Array (Fpga)  Hardware Reuse  Machine Learning (Ml) Attack  Multiplier  Physical Unclonable Function (Puf)  Response Stream (Rs)  Transfer Path (Tp)  
A 4T/Cell Amplifier-Chain-Based XOR PUF with Strong Machine Learning Attack Resilience Journal article
Zhang, Jieyun, Xu, Chongyao, Law, Man Kay, Jiang, Yang, Zhao, Xiaojin, Mak, Pui In, Martins, Rui P.. A 4T/Cell Amplifier-Chain-Based XOR PUF with Strong Machine Learning Attack Resilience[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2022, 69(1), 366-377.
Authors:  Zhang, Jieyun;  Xu, Chongyao;  Law, Man Kay;  Jiang, Yang;  Zhao, Xiaojin; et al.
Favorite | TC[WOS]:17 TC[Scopus]:18  IF:5.2/4.5 | Submit date：2022/02/21
Amplifier Chain  Hardware Security  Machine Learning Attack  Physical Unclonable Function (Puf)  
Modeling Attack Resistant Strong PUF Exploiting Obfuscated Interconnections with <0.83% Bit-Error Rate Conference paper
Xu, Chongyao, Zhang, Jieyun, Law, Man-Kay, Jiang, Yang, Zhao, Xiaojin, Mak, Pui-ln, Martins, Rui P.. Modeling Attack Resistant Strong PUF Exploiting Obfuscated Interconnections with <0.83% Bit-Error Rate[C], IEEE, 345 E 47TH ST, NEW YORK, NY 10017 USA:IEEE, 2021.
Authors:  Xu, Chongyao;  Zhang, Jieyun;  Law, Man-Kay;  Jiang, Yang;  Zhao, Xiaojin; et al.
Favorite | TC[WOS]:4 TC[Scopus]:5 | Submit date：2022/08/21
An N × N Multiplier-Based Multi-Bit Strong PUF Using Path Delay Extraction Conference paper
Chongyao Xu, Jieyun Zhang, Man-Kay Law, Xiaojin Zhao, Pui-In Mak, Rui P. Martins. An N × N Multiplier-Based Multi-Bit Strong PUF Using Path Delay Extraction[C], IEEE, 345 E 47TH ST, NEW YORK, NY 10017 USA:IEEE, 2020, 9180584.
Authors:  Chongyao Xu;  Jieyun Zhang;  Man-Kay Law;  Xiaojin Zhao;  Pui-In Mak; et al.
Favorite | TC[WOS]:1 TC[Scopus]:5 | Submit date：2022/01/25
Multiplier  Multi-bit  Physical Unclonable Function  Path Delay Extraction  
The Software/Hardware Co-Design and Implementation of SM2/3/4 Encryption/Decryption and Digital Signature System Journal article
Zheng, Xin, Xu, Chongyao, Hu, Xianghong, Zhang, Yun, Xiong, Xiaoming. The Software/Hardware Co-Design and Implementation of SM2/3/4 Encryption/Decryption and Digital Signature System[J]. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 39(10), 2055-2066.
Authors:  Zheng, Xin;  Xu, Chongyao;  Hu, Xianghong;  Zhang, Yun;  Xiong, Xiaoming
Favorite | TC[WOS]:18 TC[Scopus]:31  IF:2.7/2.9 | Submit date：2021/12/06
Encryption/decryption  Parallel Processing  Signature/verification  Sm2/3/4  Software/hardware (Sw/hw) Co-design  
A 6.4pJ/Bit Strong Physical Unclonable Function Based on Multiple-Stage Amplifier Chain Conference paper
Jieyun Zhang, Xiaojin Zhao, Man-Kay Law, Chongyao Xu, Jiahao Liu, Pui-In Mak, Rui P. Martins. A 6.4pJ/Bit Strong Physical Unclonable Function Based on Multiple-Stage Amplifier Chain[C], IEEE, 345 E 47TH ST, NEW YORK, NY 10017 USA:IEEE, 2020, 9180597.
Authors:  Jieyun Zhang;  Xiaojin Zhao;  Man-Kay Law;  Chongyao Xu;  Jiahao Liu; et al.
Favorite | TC[WOS]:0 TC[Scopus]:1 | Submit date：2022/01/25
Energy Efficiency  Multi-stage Amplifier  Physical Unclonable Function